SC18IM700IPW PHILIPS [NXP Semiconductors], SC18IM700IPW Datasheet - Page 12

• Manufacturer Part Number: SC18IM700IPW
• Description: Master I-2C - bus controller with UART interface
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
SC18IM700_1
Product data sheet
9.2.6 I
9.2.7 I
Table 7:
Remark: The numbers used in the formulas are in decimal, but the numbers to program
I2CClkH and I2CClkL are in hex.
The time-out register is used to determine the maximum time that SCL is allowed to be
LOW before the I
When the I
Table 8:
The least significant bit of I2CTO (TE bit) is used as a time-out enable/disable. A logic 1
will enable the time-out function. The time-out period can be calculated as follows:
The time-out value may vary, and it is an approximate value.
This register reports the I
transmits correctly or not.
Table 9:
time-out period
I2CClk
(I2CClkH + I2CClkL)
10 (minimum)
15
25
30
50
60
100
Bit
7:1
0
Bit 7
1
1
1
1
2
2
C-bus time-out (I2CTO)
C-bus status register (I2CStat)
Bit 6
1
1
1
1
Symbol
TO[7:1]
TE
I
2
I2CTO - I
I
2
2
C-bus interface is running, I2CTO is loaded after each I
C-bus clock frequency
C-bus status
Bit 5
1
1
1
1
=
2
I2CTO[7:1] 256
------------------------------------------- seconds
C-bus state machine is reset.
2
C-bus time-out register (address 0x09h) bit description
Rev. 01 — 28 February 2006
Bit 4
1
1
1
1
57600
I
369 kHz
246 kHz
147 kHz
123 kHz
74 kHz
61 kHz
37 kHz
2
2
Description
time-out value
enable/disable time-out function
C-bus clock frequency
C-bus transmit and receive frame status, whether the frame
logic 0 = disable
logic 1 = enable
Bit 3
0
0
0
1
Bit 2
0
0
0
0
Master I
Bit 1
0
0
1
0
2
C-bus controller with UART interface
Bit 0
0
1
0
0
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
I
I2C_OK
I2C_NACK_ON_ADDRESS
I2C_NACK_ON_DATA
I2C_TIME_OUT
2
C-bus status description
SC18IM700
2
C-bus state transition.
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