TFA9812HN PHILIPS [NXP Semiconductors], TFA9812HN Datasheet - Page 28

• Manufacturer Part Number: TFA9812HN
• Description: BTL stereo Class-D audio amplifier with I2S input
• Manufacturer: PHILIPS [NXP Semiconductors]

NXP Semiconductors
TFA9812_2
Preliminary data sheet
9.3 I
9.4 I
Table 25
byte size is 8 bits. The I
written in pairs of two bytes. Data transfer is always MSB first.
The cycle format for writing to the TFA9812 using SDA is as follows:
10. The microcontroller can either assert the stop condition (P) or continue with a further
Table 25.
Table 26
The byte size is 8 bits. The I
always read in pairs of two bytes. Data transfer is always MSB-first.
The read cycle format for writing to the TFA9812 using SDA is as follows:
Start TFA9812
S
2
2
1. The microcontroller asserts a start condition (S).
2. The microcontroller sends the device address (7 bits) of the TFA9812 followed by the
3. The TFA9812 asserts an acknowledge (A).
4. The microcontroller writes the 8-bit TFA9812 register address to which the first data
5. The TFA9812 asserts an acknowledge.
6. The microcontroller sends the first byte. This is the most significant byte of the
7. The TFA9812 asserts an acknowledge.
8. The microcontroller sends the second byte.
9. The TFA9812 asserts an acknowledgement.
1. The microcontroller asserts a start condition (S).
2. The microcontroller sends the device address (7 bits) of the TFA9812 followed by the
3. The TFA9812 asserts an acknowledge (A).
4. The microcontroller writes the 8-bit TFA9812 register address from which the first data
5. The TFA9812 asserts an acknowledge.
6. The microcontroller asserts a repeated start (Sr).
7. The microcontroller resends the device address (7 bits) of the TFA9812 followed by
8. The TFA9812 asserts an acknowledge.
C write cycle description
C read cycle description
R/!W bit set to 0.
byte will be written.
register.
pair of data bytes, repeating step 6. In the latter case the targeted register address will
have been auto-increased by the TFA9812.
R/!W bit set to 0.
byte will be read.
the R/!W bit set to 1.
Address
11010A
shows the cycle required for writing data to the I
shows the cycle required for reading data from the I
I
2
C write cycle
2
A
1
R/!W
0
Rev. 02 — 22 January 2009
2
C registers of the TFA9812 store two data bytes. Data is always
A ADDR
2
C registers of the TFA9812 store two data bytes. Data is
TFA9812 first
register address
BTL stereo Class-D audio amplifier with I
A
MS
databyte
MS1
2
C registers of the TFA9812. The
2
A
C registers of the TFA9812.
LS
databyte
LS1
© NXP B.V. 2009. All rights reserved.
TFA9812
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2
S input
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Stop
P