TFA9812HN PHILIPS [NXP Semiconductors], TFA9812HN Datasheet - Page 32
TFA9812HN
Manufacturer Part Number
TFA9812HN
Description
BTL stereo Class-D audio amplifier with I2S input
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.TFA9812HN.pdf
(66 pages)
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NXP Semiconductors
Table 32.
Table 34.
TFA9812_2
Preliminary data sheet
Bit
Symbol
Default
Bit
Symbol
Default
Bit
Symbol
Default
Bit
Symbol
Default
Register address 02h: digital input format
Register address 03h: equalizer configuration
9.5.3 Digital input format
9.5.4 Equalizer configuration
RSD
RSD
RSD
RSD
15
15
0
7
0
0
7
0
Table 31.
Table 33.
Bit
15 to 8
7 to 0
Bit
3 to 1
0
RSD
RSD
RSD
RSD
14
14
0
6
0
0
6
0
Bit description of register 00h: miscellaneous I
Bit description of register 02h: digital input format
Symbol
VOL_L[15:8]
VOL_R[7:0]
Symbol
DI_FOR[2:0]
WS_POL
RSD
RSD
RSD
RSD
13
13
0
5
0
0
5
0
Rev. 02 — 22 January 2009
RSD
RSD
RSD
RSD
12
12
0
4
0
0
4
0
Description
See
function of data byte setting.
See
function of data byte setting.
Description
Digital audio input format:
Enable WS signal polarity inversion:
BTL stereo Class-D audio amplifier with I
0 = RSD
1 = RSD
2 = MSB-justified data up to 24 bits
3 = I
4 = LSB-justified 16-bit data
5 = LSB-justified 18-bit data
6 = LSB-justified 20-bit data
7 = LSB-justified 24-bit data
0 = No WS signal polarity inversion
1 = WS signal polarity inversion enabled
Table 16
Table 16
DI_FOR2
2
S data up to 24 bits
RSD
RSD
RSD
11
11
0
3
0
0
3
0
for suppression levels on left channel as
for suppression levels on right channel as
DI_FOR1
RSD
RSD
RSD
2
10
10
C interpolator settings
0
2
1
0
2
0
DI_FOR0
EQ_BP
RSD
RSD
9
0
1
1
9
0
1
1
© NXP B.V. 2009. All rights reserved.
TFA9812
WS_POL
EQ_BND
2
RSD
RSD
S input
8
0
0
0
8
0
0
0
32 of 66
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