AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 6

• Manufacturer Part Number: AMD-K6-2E/400AFR
• Manufacturer: AMD [Advanced Micro Devices]

AMD-K6™-2E Processor Data Sheet
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6.1
6.2
6.3
6.4
6.5
6.6
7.1
7.2
7.3
Bus Cycles ................................................................................. 133
Power-On Configuration and Initialization ........................... 179
EWBE# (External Write Buffer Empty) ............................... 102
FERR# (Floating-Point Error) ............................................... 103
FLUSH# (Cache Flush) .......................................................... 104
HIT# (Inquire Cycle Hit)........................................................ 105
HITM# (Inquire Cycle Hit To Modified Line)...................... 105
HLDA (Hold Acknowledge) ................................................... 106
HOLD (Bus Hold Request)..................................................... 107
IGNNE# (Ignore Numeric Exception)................................... 108
INIT (Initialization) ................................................................ 109
INTR (Maskable Interrupt).................................................... 110
INV (Invalidation Request) ................................................... 110
KEN# (Cache Enable)............................................................. 111
LOCK# (Bus Lock) .................................................................. 112
M/IO# (Memory or I/O) ........................................................... 113
NA# (Next Address)................................................................ 114
NMI (Non-Maskable Interrupt) ............................................. 114
PCD (Page Cache Disable)..................................................... 115
PCHK# (Parity Check) ........................................................... 116
PWT (Page Writethrough) ..................................................... 117
RESET (Reset) ........................................................................ 118
RSVD (Reserved).................................................................... 119
SCYC (Split Cycle).................................................................. 120
SMI# (System Management Interrupt)................................. 121
SMIACT# (System Management Interrupt Active)............. 122
STPCLK# (Stop Clock) ........................................................... 123
TCK (Test Clock)..................................................................... 124
TDI (Test Data Input) ............................................................. 124
TDO (Test Data Output)......................................................... 124
TMS (Test Mode Select) ......................................................... 125
TRST# (Test Reset)................................................................. 125
VCC2DET (VCC2 Detect) ...................................................... 126
VCC2H/L# (VCC2 High/Low)................................................. 127
W/R# (Write/Read) ................................................................. 128
WB/WT# (Writeback or Writethrough)................................. 129
Pin Tables by Type ................................................................. 130
Bus Cycle Definitions ............................................................. 132
Timing Diagrams..................................................................... 133
Bus States................................................................................. 135
Memory Reads and Writes..................................................... 138
I/O Read and Write ................................................................. 146
Inquire and Bus Arbitration Cycles ...................................... 148
Special Bus Cycles .................................................................. 170
Signals Sampled During the Falling Transition of RESET .. 179
RESET Requirements ............................................................ 180
State of Processor After RESET............................................ 180
22529B/0—January 2000
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