AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 7

• Manufacturer Part Number: AMD-K6-2E/400AFR
• Manufacturer: AMD [Advanced Micro Devices]

22529B/0—January 2000
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Contents
7.4
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
8.11
8.12
9.1
9.2
9.3
9.4
10.1
10.2
10.3
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
12.1
12.2
12.3
12.4
12.5
13.1
13.2
13.3
13.4
13.5
14.1
Cache Organization .................................................................. 185
Write Merge Buffer ................................................................. 205
Floating-Point and Multimedia Execution Units .................. 213
System Management Mode (SMM) ........................................ 217
Test and Debug ......................................................................... 227
Clock Control ............................................................................ 247
Electrical Data .......................................................................... 253
State of Processor After INIT ................................................ 183
MESI States in the Data Cache ............................................. 186
Predecode Bits......................................................................... 187
Cache Operation ..................................................................... 187
Cache Disabling and Flushing ............................................... 190
Cache-Line Fills ...................................................................... 191
Cache-Line Replacements...................................................... 192
Write Allocate ......................................................................... 192
Prefetching .............................................................................. 197
Cache States ............................................................................ 198
Cache Coherency .................................................................... 199
Writethrough and Writeback Coherency States.................. 204
A20M# Masking of Cache Accesses ...................................... 204
EWBE# Control ....................................................................... 205
Memory Type Range Registers ............................................. 207
Memory-Range Restrictions .................................................. 209
Examples.................................................................................. 211
Floating-Point Execution Unit............................................... 213
Multimedia and 3DNow!™ Execution Units ........................ 215
Floating-Point and MMX™/3DNow!™
Instruction Compatibility....................................................... 216
SMM Operating Mode and Default Register Values........... 217
SMM State-Save Area............................................................. 219
SMM Revision Identifier........................................................ 221
SMM Base Address ................................................................. 222
Halt Restart Slot ..................................................................... 222
I/O Trap Doubleword .............................................................. 223
I/O Trap Restart Slot .............................................................. 224
Exceptions, Interrupts, and Debug in SMM......................... 226
Built-In Self-Test (BIST) ......................................................... 227
Three-State Test Mode ........................................................... 228
Boundary-Scan Test Access Port (TAP)................................ 229
L1 Cache Inhibit...................................................................... 239
Debug ....................................................................................... 240
Clock Control States ............................................................... 247
Halt State................................................................................. 249
Stop Grant State...................................................................... 250
Stop Grant Inquire State........................................................ 251
Stop Clock State...................................................................... 252
Operating Ranges ................................................................... 254
AMD-K6™-2E Processor Data Sheet
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