TDA9550 PHILIPS [NXP Semiconductors], TDA9550 Datasheet - Page 31
TDA9550
Manufacturer Part Number
TDA9550
Description
TV signal processor-Teletext decoder with embedded m-Controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.TDA9550.pdf
(125 pages)
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Philips Semiconductors
External (Auxiliary + Display) Memory
The normal 80C51 external memory area has been
mapped internally to the device, this means that the MOVX
instruction accesses data memory internal to the device.
The movx memory map is shown in Fig.8.
Auxiliary RAM Page Selection
The Auxiliary RAM page pointer is used to select one of
the 256 pages within the auxiliary RAM, not all pages are
allocated, refer to Fig.9. A page consists of 256
2000 Jun 22
TV signal processor-Teletext decoder with
embedded -Controller
(1) Amount of Data RAM depends on device, PainterOSD 64K has 0.75K,
(2) Amount of Display RAM depends on the device, PainterOSD 64K has
(3) Display RAM for Closed Caption and Text is shared
4800H
47FFH
0200H
01FFH
Painter1.1 has 1K and Painter1.10 has 2K
1.25K, Painter1.1 has 2K and Painter1.10 has 10K
7FFFH
0000H
TEXT PAGES
Lower 32K bytes
Display RAM
Data RAM
for
Fig.8 Movx Address Map
(1)
(2)
871FH
8C00H
8BFFH
8800H
87FFH
87F0H
8700H
845FH
8000H
FFFFH
Display Registers
Upper 32K bytes
Closed Caption
Display RAM
Dynamically
Re-definable
Characters
CLUT
for
(3)
31
consecutive bytes. XRAMP only works on internal MOVX
memory.
Power-on Reset
Power on reset is generated internally to the
TDA955x/6x/8x device, hence no external reset circuitry is
required. The TV processor die shall generate the master
reset in the system, which in turn will reset the
microcontroller die
A external reset pin is still present and is logically ORed
with the internal Power on reset. This pin will only be used
for test modes and OTP/ISP programming. The active high
reset pin incorporates an internal pull-down, thus it can be
left unconnected in application.
Power Saving modes of Operation
There are three Power Saving modes, Idle, Stand-by and
Power Down, incorporated into the Painter1_Plus die.
When utilizing either mode, the 3.3v power to the device
(Vddp, Vddc & Vdda) should be maintained, since Power
Saving is achieved by clock gating on a section by section
basis.
S
During Stand-by mode, the Acquisition and Display
sections of the device are disabled. The following
functions remain active:-
TAND
MOVX @Ri, A
MOVX A, @Ri
80c51 CPU Core
Memory Interface
I2C
Timer/Counters
WatchDog Timer
SAD and PWMs
-
BY
TDA955X/6X/8X PS/N1 series
M
ODE
Fig.9 Indirect addressing
FFH
00H
FFH
00H
FFH
00H
FFH
00H
(Movx address space)
(XRAMP)=FFH
(XRAMP)=FEH
(XRAMP)=01H
(XRAMP)=00H
Tentative Device Specification
01FFH
0100H
00FFH
0000H
FFFFH
FF00H
FEFFH
FE00H
MOVX @DPTR,A
MOVX A,@DPTR
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