TDA9550 PHILIPS [NXP Semiconductors], TDA9550 Datasheet - Page 68
TDA9550
Manufacturer Part Number
TDA9550
Description
TV signal processor-Teletext decoder with embedded m-Controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.TDA9550.pdf
(125 pages)
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Philips Semiconductors
Table 34 Outputs TV-processor
Explanation input control data TV-processor
Table 35 Timing of ‘wide blanking’
Table 36 Soft clipping level
Table 37 Peak White Limiting; note 1
Note
1. CVBS/Y input signal at which the Peak White Limiting
Table 38 Off-set IF demodulator
2000 Jun 22
Output status bytes
DAC SETTING
SOC1
DAC SETTING
DAC SETTING
TV signal processor-Teletext decoder with
embedded -Controller
0
0
1
1
is activated. Nominal input signal: 1.0 V
0F
3F
00
0F
20
0
0
FUNCTION
SOC0
0
1
0
1
0% above PWL level
5% above PWL level
10% above PWL level
soft clipping off
3.5 / 7.8 s
5.9 / 10.2 s
0.55 V
0.85 V
tbf
no correction
tbf
VOLTAGE DIFFERENCE BETWEEN
SOFT CLIPPING AND PWL
BL-WH
BL-WH
SUBADDR
CONTROL
CONTROL
SETTING
00
01
02
03
04
BL-WH
POR
XPR
SUP
SN1
ID7
D7
.
AGC
NDF
SN0
ID6
D6
IFI
68
Table 39 Horizontal parallelogram
Table 40 Horizontal bow
Table 41 Hue control
Table 42 Horizontal shift
DAC SETTING
DAC SETTING
DAC SETTING
DAC SETTING
LOCK
FSI
ID5
D5
X
0
20
3F
20
3F
20
3F
20
3F
0
0
0
0
TDA955X/6X/8X PS/N1 series
QSS
IVW
ID4
DATA BYTE
D4
SL
X
screen top 0.5 s delayed and screen
bottom 0.5 s advanced with respect
to centre
no correction
screen top 0.5 s advanced and
screen bottom 0.5 s delayed with
respect to centre
screen top and bottom 0.5 s delayed
with respect to centre
no correction
screen top and bottom 0.5 s
advanced with respect to centre
0
+45
0
+2 s
45
2 s
WBC
CD3
AFA
ID3
D3
X
Tentative Device Specification
HBC
CD2
AFB
ID2
CONTROL
CONTROL
CONTROL
CONTROL
D2
X
FMW
CD1
BCF
ID1
D1
X
CD0
FML
IN2
ID0
D0
X
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