TDA9550 PHILIPS [NXP Semiconductors], TDA9550 Datasheet - Page 67
TDA9550
Manufacturer Part Number
TDA9550
Description
TV signal processor-Teletext decoder with embedded m-Controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.TDA9550.pdf
(125 pages)
- Current page: 67 of 125
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Philips Semiconductors
DESCRIPTION OF THE I
Table 33 Inputs TV-processor
Note
1. These functions are only available in versions which have the East-West drive output.
2. The AVL function is only available in versions which have no East-West output or when the subcarrier output is used for
3. Only available in types with QSS sound IF circuit and AM demodulator.
2000 Jun 22
Timing of ‘wide blanking’
Peak white limiting
Off-set IF demodulator
Horizontal parallelogram
Horizontal bow
Hue
Horizontal shift (HS)
EW width (EW)
EW parabola/width (PW)
EW upper corner parabola
EW lower corner parabola
EW trapezium (TC)
Vertical slope (VS)
Vertical amplitude (VA)
S-correction (SC)
Vertical shift (VSH)
Vertical zoom (VX)
Black level offset R
Black level offset G
White point R
White point G
White point B
Peaking
Luminance delay time
Brightness
Saturation
Contrast
AGC take-over
Volume control
Colour decoder 0
Colour decoder 1
AV-switch 0
AV-switch 1
Synchronisation 0
Synchronisation 1
Deflection
Vision IF 0
Vision IF 1
Sound 0
Control 0
Control 1
Sound 1
Features 0
Features 1
TV signal processor-Teletext decoder with
embedded -Controller
the connection of the AVL capacitor (via the bits CMB1 and CMB0 in subaddress 22H).
FUNCTION
(1)
(1)
(1)
2
(1)
C-BUS SUBADDRESSES
(1)
(1)
SUBADDR
(HEX)
0C
0D
1C
1D
2C
2D
0A
0B
0E
0F
1A
1B
1E
1F
2A
2B
2E
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
WBF3 WBF2 WBF1
OSVE
CM3
AGN
FMD
PF1
IFA
SIF
D7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CM2
SM1
HP2
AFN
PF0
IFB
IFE
IE2
D6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
67
FMWS
AGCM
SOC1
COR1
RPO1
CM1
SVO
FOA
ADX
DFL
RBL
FSL
IFC
D5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
A5
0
0
0
0
WBF0
SOC0
CMB1
COR0
RPO0
AM
OSO
VSW
TDA955X/6X/8X PS/N1 series
CM0
IFLH
FOB
XDT
AKB
SOY
DATA BYTE
D4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
A4
0
0
0
0
(3)
WBR3 WBR2 WBR1 WBR0
AMFM AGC1 AGC0
CMB0
FORF FORS
MOD
POC
FMR
SM0
DSK
YD3
MAT
SBL
CL3
D3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
A3
0
0
0
0
AVL
YUV1
MUS
AFW
FMC
AVG
YD2
E2D
STB
CL2
INA
Tentative Device Specification
D2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
0
0
0
(2)
YUV0 HBL
FMB
QSS
BPS
EVG
YD1
ACL
BLS
VIM
CL1
INB
IFS
DL
D1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
0
0
HCO
RGBL
NCIN
FCO
STM
FMA
BKS
YD0
CL0
INC
VID
FMI
FFI
CB
D0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
A0
0
(1)
(1)
Value
POR
88
08
20
20
20
00
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
00
20
20
20
20
20
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
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