ADV7181 AD [Analog Devices], ADV7181 Datasheet - Page 56

• Manufacturer Part Number: ADV7181
• Description: Multiformat SDTV Video Decoder
• Manufacturer: AD [Analog Devices]

ADV7181B
Table 73. PAL Line Enable Bits and
Corresponding Line Numbering
line[3:0]
12
13
14
15
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
10
11
IF Compensation Filter
IFFILTSEL[2:0] IF Filter Select Address 0xF8 [2:0]
The IFFILTSEL[2:0] register allows the user to compensate for
SAW filter characteristics on a composite input as would be
observed on tuner outputs. Figure 35 and Figure 36 show IF
filter compensation for NTSC and PAL.
The options for this feature are as follows:
•
•
•
See Table 84 for programming details.
Bypass mode (default)
NTSC—consists of three filter characteristics
PAL—consists of three filter characteristics
Line Number
(ITU-R BT.470)
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
321 (8)
322 (9)
323 (10)
324 (11)
325 (12)
326 (13)
327 (14)
328 (15)
329 (16)
330 (17)
331 (18)
332 (19)
333 (20)
334 (21)
335 (22)
336 (23)
Enable Bit
GDECOL[0]
GDECOL[1]
GDECOL[2]
GDECOL[3]
GDECOL[4]
GDECOL[5]
GDECOL[6]
GDECOL[7]
GDECOL[8]
GDECOL[9]
GDECOL[10]
GDECOL[11]
GDECOL[12]
GDECOL[13]
GDECOL[14]
GDECOL[15]
GDECEL[0]
GDECEL[1]
GDECEL[2]
GDECEL[3]
GDECEL[4]
GDECEL[5]
GDECEL[6]
GDECEL[7]
GDECEL[8]
GDECEL[9]
GDECEL[10]
GDECEL[11]
GDECEL[12]
GDECEL[13]
GDECEL[14]
GDECEL[15]
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Rev. 0 | Page 56 of 96
I
The ADV7181B has a comprehensive interrupt register set. This
map is located in Register Access Page 2. See Table 82 or details
of the interrupt register map.
How to access this map is described in Figure 37.
2
P
C Interrupt System
P
ADDRESS 0x0E BIT 6,5 = 00b
REGISTER ACCESS PAGE 1
NORMAL REGISTER SPACE
ADDRESS 0x40 => 0xFF
–10
–12
ADDRESS 0x00 => 0x3F
–2
–4
–6
–8
–2
–4
–6
–8
COMMON I
6
4
2
0
6
4
2
0
2.0
3.0
I
2
Figure 35. NTSC IF Compensation Filter Responses
Figure 36. PAL IF Compensation Filter Responses
C SPACE
Figure 37. Register Access —Page 1 and Page 2
2
C SPACE
2.5
3.5
3.0
4.0
FREQUENCY (MHz)
FREQUENCY (MHz)
3.5
4.5
INTERRUPT REGISTER SPACE
ADDRESS 0x0E BIT 6,5 = 01b
REGISTER ACCESS PAGE 2
ADDRESS 0x40 => 0x4C
4.0
5.0
I
2
C SPACE
4.5
5.5
5.0
6.0