ADV7181 AD [Analog Devices], ADV7181 Datasheet - Page 83

• Manufacturer Part Number: ADV7181
• Description: Multiformat SDTV Video Decoder
• Manufacturer: AD [Analog Devices]

Subaddress
0x51
0x8F
0x90
0x91
0x92
0x93
0x94
0x95
0x96
0x97
0x98
Register
Lock Count
Free Run
Line
Length 1
VBI Info
(Read
Only)
WSS1
(Read Only)
WSS2
(Read Only)
EDTV1
(Read Only)
EDTV2
(Read Only)
EDTV3
(Read Only)
CGMS1
(Read Only)
CGMS2
(Read Only)
CGMS3
(Read Only)
Bit Description
CIL[2:0]. Count-into-lock determines
the number of lines the system must
remain in lock before showing a
locked status.
COL[2:0]. Count-out-of-lock
determines the number of lines the
system must remain out-of-lock
before showing a lost-locked status.
SRLS. Select raw lock signal. Selects
the determination of the lock.
Status.
FSCLE. Fsc lock enable.
Reserved
LLC_PAD_SEL [2:0]. Enables manual
selection of clock for LLC1 pin.
Reserved
WSSD. Screen signaling detected.
CCAPD. Closed caption data.
EDTVD. EDTV sequence
CGMSD. CGMS sequence
Reserved
WSS1[7:0]
Wide screen signaling data.
WSS2[7:0]
Wide screen signaling data.
EDTV1[7:0]
EDTV data register.
EDTV2[7:0]
EDTV data register.
EDTV3[7:0]
EDTV data register.
CGMS1[7:0]
CGMS data register.
CGMS2[7:0]
CGMS data register.
CGMS3[7:0]
CGMS data register.
Rev. 0 | Page 83 of 96
7 6
0
1
0
x x
x x
x x
x x
x x
x x
x x
x x
x x
0
1
0
1
5
0
0
0
0
1
1
1
1
0
0
x
x
x
x
x
x
x
x
x
4 3
0
0
1
1
0
0
1
1
0
1
x
x
x
x
x
x
x
x
x
Bits
0
1
0
1
0
1
0
1
0
0
1
x
x
x
x
x
x
x
x
2
0
0
0
0
1
1
1
1
0
0
1
x
x
x
x
x
x
x
x
1
0
0
1
1
0
0
1
1
0
0
1
x
x
x
x
x
x
x
x
0
0
1
0
1
0
1
0
1
0
0
1
x
x
x
x
x
x
x
x
Comments
info
Lock status set only by
horizontal lock
Lock status set by
horizontal lock and
subcarrier lock.
selected out on LLC1 pin
selected out on LLC1 pin
Set to default
detected
detected
WSS2[7:6] are
undetermined
EDTV3[7:6] are
undetermined
CGMS3[7:4] are
undetermined
1 line of video
2 lines of video
5 lines of video
10 lines of video
100 lines of video
500 lines of video
1000 lines of video
100000 lines of video
1 line of video
2 lines of video
5 lines of video
10 lines of video
100 lines of video
500 lines of video
1000 lines of video
100000 lines of video
Over field with vertical
Line-to-line evaluation
Set to default
LLC1 (nominal 27 MHz)
LLC2 (nominally 13.5 MHz)
No WSS detected
WSS detected
No CCAP signals detected
CCAP sequence detected
No EDTV sequence
EDTV sequence detected
No CGMS transition
CGMS sequence decoded
Notes
For 16-bit 4:2:2 out,
OF_SEL[3:0] = 0010
Read-only status
bits
EDTV3[5] is reserved
for future use
ADV7181B