DAC1208D650HN NXP [NXP Semiconductors], DAC1208D650HN Datasheet - Page 15
DAC1208D650HN
Manufacturer Part Number
DAC1208D650HN
Description
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.DAC1208D650HN.pdf
(98 pages)
- Current page: 15 of 98
- Download datasheet (574Kb)
NXP Semiconductors
DAC1208D650
Product data sheet
10.2.5.1 Single device operation
10.2.5.2 Multi-device operation
10.2.4 Descrambler
10.2.5 inter-lane alignment
The descrambler is the a 16-bit parallel self-synchronous descrambler based on the
polynomial 1 + x
This feature removes strict PCB design skew compensation between the lanes.
This module handles the alignment of the four data streams. Because of inter-lane skew
and each PLL per lane concept, these alignment characters may be received at different
times by the receivers. After the synchronization period, the lock signal will be HIGH. This
enables the receipt of K28.3 /A/ characters.The /A/ characters provided in the initial
alignment sequence are used to align the four data streams.
The ILA_CNTRL register’s SEL_ILA[1:0] bits select which K28.3 /A/ symbol triggers the
initial lane alignment:“00” = 1st /A/ symbol, “01” = 2nd /A/ symbol, “10” = 3rd /A/ symbol,
“11” = 4th /A/ symbol;
selected /A/, they start propagating the received data to the frame assembly module at the
same point in time.
This module can compensate for up to ±7 frame clock period misalignments between the
lanes.
When initial lane alignment is not supported, the manual alignment mode can be used.
After the initial ILA sequence, the lane alignment monitoring starts. If the received user
data contains a K28.3 /A/ symbol:
DAC1208D650 implements a multi-device inter-lane alignment that guarantees a skew of
less than one output period between them.
Two modes are available: master/slave and all slave. Both make use of the MDS_P and
MDS_N pins.
•
•
•
its position is compared to the value of the alignment monitor counter
if two successive K28.3 /A/ symbols have been received at a wrong position, a
realignment takes place
if the buffers are empty or overflow, this is indicated by the registers
ILA_BUF_ERR_LN0 to ILA_BUF_ERR_LN3
All information provided in this document is subject to legal disclaimers.
14
+ x
Rev. 2 — 14 December 2010
15
Table 86 on page
. This processing can be turned off.
2×, 4× or 8× interpolating DAC with JESD204A interface
61. When all receivers have received their first
DAC1208D650
© NXP B.V. 2010. All rights reserved.
15 of 98
Related parts for DAC1208D650HN
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
NXP Semiconductors designed the LPC2420/2460 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
NXP Semiconductors designed the LPC2458 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
NXP Semiconductors designed the LPC2468 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
NXP Semiconductors designed the LPC2470 microcontroller, powered by theARM7TDMI-S core, to be a highly integrated microcontroller for a wide range ofapplications that require advanced communications and high quality graphic displays
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
NXP Semiconductors designed the LPC2478 microcontroller, powered by theARM7TDMI-S core, to be a highly integrated microcontroller for a wide range ofapplications that require advanced communications and high quality graphic displays
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The NXP BlueStreak LH75401/LH75411 family consists of two low-cost 16/32-bit System-on-Chip (SoC) devices
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The NXP LPC3141 combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors
Part Number:
Description:
The NXP LPC3143 combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors
Part Number:
Description:
The NXP LPC3152 combines an 180 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors
Part Number:
Description:
The NXP LPC3154 combines an 180 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors
Part Number:
Description:
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using NXP High-Performance Automotive (HPA) TrenchMOS technology
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using NXP High-Performance Automotive (HPA) TrenchMOS technology
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using NXP High-Performance Automotive (HPA) TrenchMOS technology
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using NXP High-Performance Automotive (HPA) TrenchMOS technology
Manufacturer:
NXP Semiconductors
Datasheet: