ADSP-BF561SBBCZ-5A2 AD [Analog Devices], ADSP-BF561SBBCZ-5A2 Datasheet - Page 37
ADSP-BF561SBBCZ-5A2
Manufacturer Part Number
ADSP-BF561SBBCZ-5A2
Description
Manufacturer
AD [Analog Devices]
Datasheet
1.ADSP-BF561SBBCZ-5A2.pdf
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Universal Asynchronous Receiver Transmitter (UART)
Port—Receive and Transmit Timing
Figure 23
The maximum baud rate is SCLK/16. As shown in
there is some latency between the generation internal UART
interrupts and the external data operations. These latencies are
negligible at the data transmission rates for the UART.
TRANSMIT
describes UART port receive and transmit operations.
RECEIVE
(SAMPLE CLOCK)
Rx
UART RECEIVE
UART TRANSMIT
Tx
INTERRUPT
INTERNAL
INTERRUPT
INTERNAL
CLKOUT
WRITEN TO
AS DATA
BUFFER
START
Figure 23. UART Port—Receive and Transmit Timing
Figure
Rev. B | Page 37 of 64 | June 2007
23,
DATA8–5
DATA8–5
STOP
STOP2–1
UART TRANSMIT BIT SET BY PROGRAM;
UART RECEIVE BIT SET BY DATA STOP;
CLEARED BY WRITE TO TRANSMIT
CLEARED BY FIFO READ
ADSP-BF561
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