ADSP-BF561SBBCZ-5A2 AD [Analog Devices], ADSP-BF561SBBCZ-5A2 Datasheet - Page 38

no-image

ADSP-BF561SBBCZ-5A2

Manufacturer Part Number
ADSP-BF561SBBCZ-5A2
Description
Manufacturer
AD [Analog Devices]
Datasheet
ADSP-BF561
Programmable Flags Cycle Timing
Table 28
Table 28. Programmable Flags Cycle Timing
Parameter
Timing Requirement
t
Switching Characteristic
t
WFI
DFO
Flag Input Pulse Width
Flag Output Delay from CLKOUT Low
and
PFx (OUTPUT)
PFx (INPUT)
CLKOUT
Figure 24
describe programmable flag operations.
Figure 24. Programmable Flags Cycle Timing
Rev. B | Page 38 of 64 | June 2007
t
DFO
t
WFI
FLAG INPUT
FLAG OUTPUT
Min
t
SCLK
+ 1
Max
6
Unit
ns
ns

Related parts for ADSP-BF561SBBCZ-5A2