PIC18F23K20-E/MLQTP MICROCHIP [Microchip Technology], PIC18F23K20-E/MLQTP Datasheet - Page 154

• Manufacturer Part Number: PIC18F23K20-E/MLQTP
• Description: 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F2XK20/4XK20
14.5
If either of the CCP modules is configured to use
Timer3 and to generate a Special Event Trigger
in Compare mode (CCP1M<3:0> or CCP2M<3:0> =
1011), this signal will reset Timer3. It will also start an
A/D conversion if the A/D module is enabled (see
Section 15.3.4 “Special Event Trigger” for more
information).
The module must be configured as either a timer or
synchronous counter to take advantage of this feature.
When used this way, the CCPR2H:CCPR2L register
pair effectively becomes a period register for Timer3.
If Timer3 is running in Asynchronous Counter mode,
the Reset operation may not work.
In the event that a write to Timer3 coincides with a
Special Event Trigger from a CCP module, the write will
take precedence.
TABLE 14-1:
DS41303B-page 152
INTCON
PIR2
PIE2
IPR2
TMR3L
TMR3H
T1CON
T3CON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer3 module.
Note:
Name
Resetting Timer3 Using the CCP
Special Event Trigger
The Special Event Triggers from the CCP2
module will not set the TMR3IF interrupt
flag bit of the PIR2 register.
Timer3 Register, Low Byte
Timer3 Register, High Byte
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIE
OSCFIP
OSCFIF
RD16
RD16
Bit 7
REGISTERS ASSOCIATED WITH TIMER3 AS A TIMER/COUNTER
T3CCP2
T1RUN
Bit 6
C1IF
C1IE
C1IP
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
T3CKPS1 T3CKPS0 T3CCP1
C2IE
C2IP
Bit 5
C2IF
Advance Information
INT0IE
EEIF
EEIE
EEIP
Bit 4
BCLIF
BCLIE
BCLIP
RBIE
Bit 3
T3SYNC
TMR0IF
HLVDIF
HLVDIE
HLVDIP
Bit 2
TMR1CS TMR1ON
TMR3CS TMR3ON
TMR3IF
TMR3IE
TMR3IP
INT0IF
Bit 1
© 2007 Microchip Technology Inc.
CCP2IE
CCP2IP
CCP2IF
RBIF
Bit 0
on page
Values
Reset
57
60
60
60
59
59
58
59