PIC18F23K20-E/MLQTP MICROCHIP [Microchip Technology], PIC18F23K20-E/MLQTP Datasheet - Page 302
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PIC18F23K20-E/MLQTP
Manufacturer Part Number
PIC18F23K20-E/MLQTP
Description
28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F23K20-EMLQTP.pdf
(420 pages)
- Current page: 302 of 420
- Download datasheet (8Mb)
PIC18F2XK20/4XK20
23.3
The overall structure of the code protection on the
PIC18 Flash devices differs significantly from other
PIC
The user program memory is divided into five blocks.
One of these is a boot block of 0.5K or 2K bytes,
depending on the device. The remainder of the mem-
ory is divided into individual blocks on binary bound-
aries.
FIGURE 23-2:
TABLE 23-3:
DS41303B-page 300
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
Legend: Shaded cells are unimplemented.
Note 1:
®
microcontroller devices.
File Name
(2000h-1FFFFFh)
Program Verification and
Code Protection
(PIC18FX3K20)
Unimplemented
(1000h-1FFFh)
(000h-1FFh)
(200h-FFFh)
Unimplemented in PIC18FX3K20 and PIC18FX4K20 devices; maintain this bit set.
Boot Block
CONFIG5L
CONFIG5H
CONFIG6L
CONFIG6H
CONFIG7L
CONFIG7H
Read ‘0’s
8 Kbytes
Block 0
Block 1
SUMMARY OF CODE PROTECTION REGISTERS
CODE-PROTECTED PROGRAM MEMORY FOR PIC18F2XK20/4XK20
WRTD
Bit 7
CPD
—
—
—
—
(4000h-1FFFFFh)
(PIC18FX4K20)
Unimplemented
(2000h-3FFFh)
(800h-1FFFh)
(000h-7FFh)
16 Kbytes
Boot Block
Read ‘0’s
Block 0
Block 1
MEMORY SIZE/DEVICE
EBTRB
WRTB
Bit 6
CPB
—
—
—
Advance Information
WRTC
Bit 5
(8000h-1FFFFFh)
(PIC18FX5K20)
—
—
—
—
—
Unimplemented
(2000h-3FFFh)
(4000h-5FFFh)
(6000h-7FFFh)
(800h-1FFFh)
(000h-7FFh)
32 Kbytes
Boot Block
Read ‘0’s
Block 0
Block 1
Block 2
Block 3
Bit 4
—
—
—
—
—
—
Each of the five blocks has three code protection bits
associated with them. They are:
• Code-Protect bit (CPn)
• Write-Protect bit (WRTn)
• External Block Table Read bit (EBTRn)
Figure 23-2 shows the program memory organization
for 8, 16 and 32-Kbyte devices and the specific code
protection bit associated with each block. The actual
locations of the bits are summarized in Table 23-3.
(10000h-1FFFFFh)
EBTR3
(PIC18FX6K20)
WRT3
(C000h-FFFFh)
Unimplemented
(8000h-BFFFh)
(4000h-7FFFh)
CP3
(800h-3FFFh)
(000h-7FFh)
Bit 3
Boot Block
64 Kbytes
—
—
—
Read ‘0’s
Block 0
Block 1
Block 2
Block 3
(1)
(1)
(1)
EBTR2
WRT2
CP2
Bit 2
© 2007 Microchip Technology Inc.
—
—
—
(1)
(1)
(1)
Block Code Protection
CPB, WRTB, EBTRB
CP0, WRT0, EBTR0
CP1, WRT1, EBTR1
CP2, WRT2, EBTR2
CP3, WRT3, EBTR3
(Unimplemented
Memory Space)
Controlled By:
EBTR1
WRT1
Bit 1
CP1
—
—
—
EBTR0
WRT0
Bit 0
CP0
—
—
—
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