PIC18F23K20-E/MLQTP MICROCHIP [Microchip Technology], PIC18F23K20-E/MLQTP Datasheet - Page 273
PIC18F23K20-E/MLQTP
Manufacturer Part Number
PIC18F23K20-E/MLQTP
Description
28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F23K20-EMLQTP.pdf
(420 pages)
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20.2
Each
Configuration register: CM1CON0 for Comparator C1
and CM2CON0 for Comparator C2. In addition,
Comparator C2 has a second control register,
CM2CON1, for controlling the interaction with Timer1 and
simultaneous reading of both comparator outputs.
The CM1CON0 and CM2CON0 registers (see Registers
20-1 and 20-2, respectively) contain the control and
Status bits for the following:
• Enable
• Input selection
• Reference selection
• Output selection
• Output polarity
• Speed selection
20.2.1
Setting the CxON bit of the CMxCON0 register enables
the comparator for operation. Clearing the CxON bit
disables the comparator resulting in minimum current
consumption.
20.2.2
The CxCH<1:0> bits of the CMxCON0 register direct
one of four analog input pins to the comparator
inverting input.
20.2.3
Setting the CxR bit of the CMxCON0 register directs an
internal voltage reference or an analog input pin to the
non-inverting
Section 21.0
information on the Internal Voltage Reference module.
20.2.4
The output of the comparator can be monitored by
reading either the CxOUT bit of the CMxCON0 register
or the MCxOUT bit of the CM2CON1 register. In order
to make the output available for an external connection,
the following conditions must be true:
• CxOE bit of the CMxCON0 register must be set
• Corresponding TRIS bit must be cleared
• CxON bit of the CMxCON0 register must be set
© 2007 Microchip Technology Inc.
Note:
comparator
Comparator Control
COMPARATOR ENABLE
COMPARATOR INPUT SELECTION
To use CxIN+ and C12INx- pins as analog
inputs, the appropriate bits must be set in
the ANSEL register and the corresponding
TRIS bits must also be set to disable the
output drivers.
COMPARATOR REFERENCE
SELECTION
COMPARATOR OUTPUT
SELECTION
“V
input
OLTAGE
has
of
a
R
the
EFERENCES
separate
comparator.
” for
control
Advance Information
more
See
and
20.2.5
Inverting the output of the comparator is functionally
equivalent to swapping the comparator inputs. The
polarity of the comparator output can be inverted by
setting the CxPOL bit of the CMxCON0 register.
Clearing the CxPOL bit results in a non-inverted output.
Table 20-1 shows the output state versus input
conditions, including polarity control.
TABLE 20-1:
20.2.6
The trade-off between speed or power can be opti-
mized during program execution with the CxSP control
bit. The default state for this bit is ‘1’ which selects the
normal speed mode. Device power consumption can
be optimized at the cost of slower comparator propaga-
tion delay by clearing the CxSP bit to ‘0’.
20.3
The comparator output is indeterminate for a period of
time after the change of an input source or the selection
of a new reference voltage. This period is referred to as
the response time. The response time of the
comparator differs from the settling time of the voltage
reference. Therefore, both of these times must be
considered when determining the total response time
to a comparator input change. See the Comparator and
Voltage Reference Specifications in Section 26.0
“Electrical Characteristics” for more details.
PIC18F2XK20/4XK20
CxV
CxV
CxV
CxV
Input Condition
Note 1: The CxOE bit overrides the PORT data
IN
IN
IN
IN
- > CxV
- < CxV
- > CxV
- < CxV
2: The internal output of the comparator is
Comparator Response Time
COMPARATOR OUTPUT POLARITY
COMPARATOR SPEED SELECTION
latch. Setting the CxON has no impact on
the port override.
latched with each instruction cycle.
Unless otherwise specified, external
outputs are not latched.
IN
IN
IN
IN
+
+
+
+
COMPARATOR OUTPUT
STATE VS. INPUT
CONDITIONS
CxPOL
0
0
1
1
DS41303B-page 271
CxOUT
0
1
1
0
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