PIC18F23K20-E/MLQTP MICROCHIP [Microchip Technology], PIC18F23K20-E/MLQTP Datasheet - Page 81

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PIC18F23K20-E/MLQTP

Manufacturer Part Number
PIC18F23K20-E/MLQTP
Description
28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
TABLE 5-2:
© 2007 Microchip Technology Inc.
SPBRGH
SPBRG
RCREG
TXREG
TXSTA
RCSTA
EEADR
EEADRH
EEDATA
EECON2
EECON1
IPR2
PIR2
PIE2
IPR1
PIR1
PIE1
OSCTUNE
TRISE
TRISD
TRISC
TRISB
TRISA
LATE
LATD
LATC
LATB
LATA
PORTE
PORTD
PORTC
PORTB
PORTA
ANSELH
ANSEL
IOCB
WPUB
CM1CON0
CM2CON0
CM2CON1
SLRCON
SSPMSK
Legend:
Note
File Name
(2)
(2)
(2)
(2)
(2)
1:
2:
3:
4:
5:
6:
(6)
x = unknown, u = unchanged, — = unimplemented, q = value depends on condition
The SBOREN bit is only available when the BOREN<1:0> Configuration bits = 01; otherwise it is disabled and reads as ‘0’. See
Section 4.4 “Brown-out Reset (BOR)”.
These registers and/or bits are not implemented on 28-pin devices and are read as ‘0’. Reset values are shown for 40/44-pin devices;
individual unimplemented bits should be interpreted as ‘-’.
The PLLEN bit is only available in specific oscillator configuration; otherwise it is disabled and reads as ‘0’. See Section 2.6.2 “PLL in
HFINTOSC Modes”.
The RE3 bit is only available when Master Clear Reset is disabled (MCLRE Configuration bit = 0). Otherwise, RE3 reads as ‘0’. This bit is
read-only.
RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary oscillator modes.
When disabled, these bits read as ‘0’.
All bits of the ANSELH register initialize to ‘0’ if the PBADEN bit of CONFIG3H is ‘0’.
EUSART Baud Rate Generator Register, High Byte
EUSART Baud Rate Generator Register, Low Byte
EUSART Receive Register
EUSART Transmit Register
EEPROM Data Register
EEPROM Control Register 2 (not a physical register)
PORTD Data Direction Control Register
PORTC Data Direction Control Register
PORTB Data Direction Control Register
PORTD Data Latch Register (Read and Write to Data Latch)
PORTC Data Latch Register (Read and Write to Data Latch)
PORTB Data Latch Register (Read and Write to Data Latch)
TRISA7
MC1OUT
EEADR7
PSPIP
PSPIF
PSPIE
LATA7
OSCFIP
OSCFIF
OSCFIE
INTSRC
ANS7
EEPGD
WPUB7
RA7
IOCB7
CSRC
SPEN
C1ON
C2ON
MSK7
Bit 7
RD7
RC7
RB7
IBF
(5)
REGISTER FILE SUMMARY (PIC18F2XK20/4XK20) (CONTINUED)
(2)
(2)
(2)
(2)
(5)
(5)
TRISA6
MC2OUT
PLLEN
EEADR6
LATA6
ANS6
WPUB6
C1OUT
C2OUT
IOCB6
RA6
CFGS
MSK6
ADIP
ADIE
Bit 6
C1IP
C1IF
C1IE
ADIF
OBF
RD6
RC6
TX9
RX9
RB6
(5)
(2)
(5)
(3)
(5)
Data Direction Control Register for PORTA
PORTA Data Latch Register (Read and Write to Data Latch)
EEADR5
C1RSEL
ANS5
WPUB5
IOCB5
SREN
TXEN
TUN5
C1OE
C2OE
MSK5
C2IP
C2IE
RCIP
RCIF
RCIE
IBOV
Bit 5
C2IF
RD5
RC5
RB5
RA5
(2)
Advance Information
PSPMODE
EEADR4
C2RSEL
WPUB4
C1POL
C2POL
ANS12
IOCB4
SYNC
CREN
FREE
MSK4
TUN4
ANS4
SLRE
Bit 4
EEIP
EEIF
EEIE
TXIP
TXIF
TXIE
RD4
RC4
RB4
RA4
EEADR3
WRERR
ADDEN
WPUB3
SENDB
ANS11
BCLIP
BCLIF
BCLIE
SSPIP
SSPIF
SSPIE
RE3
TUN3
ANS3
C1SP
C2SP
SLRD
MSK3
Bit 3
RD3
RC3
RB3
RA3
(4)
PIC18F2XK20/4XK20
PORTE Data Latch Register
(Read and Write to Data Latch)
EEADR2
CCP1IP
CCP1IE
HLVDIP
HLVDIF
HLVDIE
CCP1IF
TRISE2
WPUB2
ANS10
WREN
RE2
BRGH
FERR
MSK2
TUN2
ANS2
SLRC
Bit 2
RD2
RC2
RB2
RA2
C1R
C2R
(2)
EEADR1
EEADR9
TMR3IP
TMR3IF
TMR3IE
TMR2IP
TMR2IF
TMR2IE
WPUB1
TRISE1
C1CH1
C2CH1
OERR
RE1
TRMT
MSK1
TUN1
ANS9
ANS1
SLRB
Bit 1
RD1
RC1
RB1
RA1
WR
(2)
EEADR0
EEADR8
CCP2IP
CCP2IE
TMR1IP
TMR1IF
TMR1IE
CCP2IF
TRISE0
WPUB0
C1CH0
C2CH0
RE0
RX9D
TUN0
ANS8
ANS0
SLRA
MSK0
TX9D
Bit 0
RD0
RC0
RB0
RA0
RD
(2)
0000 0000
0000 0000
0000 0000
0000 0000
0000 0010
0000 000x
0000 0000 59, 88, 97
---- --00 59, 88, 97
0000 0000 59, 88, 97
0000 0000 59, 88, 97
xx-0 x000 59, 89, 97
1111 1111
0000 0000
0000 0000
1111 1111
0000 0000
0000 0000
0q00 0000
0000 -111
1111 1111
1111 1111
1111 1111
1111 1111
---- -xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- x000
xxxx xxxx
xxxx xxxx
xxx0 0000
xx0x 0000
---1 1111
1111 1111
0000 ----
1111 1111
0000 0000
0000 0000
0000 ----
---1 1111
1111 1111
POR, BOR
DS41303B-page 79
Value on
on page:
Details
59, 227
59, 227
59, 228
59, 227
59, 236
59, 237
60, 113
60, 109
60, 112
60, 108
60, 110
60, 130
60, 126
60, 123
60, 120
60, 117
60, 129
60, 126
60, 123
60, 120
60, 117
60, 129
60, 126
60, 123
60, 120
60, 117
60, 133
60, 132
60, 120
60, 120
60, 274
60, 275
61, 277
61, 134
61, 204
60, 111
31, 60

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