PIC18F23K20-E/MLQTP MICROCHIP [Microchip Technology], PIC18F23K20-E/MLQTP Datasheet - Page 214

• Manufacturer Part Number: PIC18F23K20-E/MLQTP
• Description: 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F2XK20/4XK20
17.4.7
In I
reload value is placed in the SSPADD register
(Figure 17-17). When a write occurs to SSPBUF, the
Baud Rate Generator will automatically begin counting.
The BRG counts down to ‘0’ and stops until another
reload has taken place. The BRG count is decre-
mented twice per instruction cycle (T
Q4 clocks. In I
automatically. One half of the SCL period is equal to
[(SSPADD+1) • 2]/F
(F
FIGURE 17-17:
TABLE 17-3:
DS41303B-page 212
Note 1:
CY
2
C Master mode, the Baud Rate Generator (BRG)
/F
SCL
) -1.
64 MHz
64 MHz
64 MHz
40 MHz
40 MHz
40 MHz
16 MHz
16 MHz
16 MHz
4 MHz
4 MHz
4 MHz
The I
100 kHz) in all details, but may be used with care where higher rates are required by the application.
BAUD RATE
F
OSC
2
C Master mode, the BRG is reloaded
2
C interface does not conform to the 400 kHz I
I
2
C™ CLOCK RATE W/BRG
BAUD RATE GENERATOR BLOCK DIAGRAM
OSC
SSPM<3:0>
. Therefore SSPADD =
SCL
CY
) on the Q2 and
16 MHz
16 MHz
16 MHz
10 MHz
10 MHz
10 MHz
4 MHz
4 MHz
1 MHz
1 MHz
1 MHz
SSPM<3:0>
4 MHz
F
CY
Advance Information
Control
Reload
CLKOUT
Reload
2
Once
transmission of the last data bit is followed by ACK), the
internal clock will automatically stop counting and the
SCL pin will remain in its last state.
Table 17-3 demonstrates clock rates based on
instruction cycles and the BRG value loaded into
SSPADD.
BRG Down Counter
C specification (which applies to rates greater than
SSPADD<7:0>
BRG Value
the
0Ch
27h
32h
3Fh
18h
1Fh
63h
09h
27h
02h
09h
00h
given
operation
© 2007 Microchip Technology Inc.
F
OSC
(2 Rollovers of BRG)
/2
is
400 kHz
400 kHz
400 kHz
333 kHz
313.7 kHz
312.5 kHz
1 MHz
250 kHz
100 kHz
308 kHz
100 kHz
100 kHz
F
complete
SCL
(1)
(1)
(1)
(1)
(1)
(i.e.,