PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 169

• Manufacturer Part Number: PIC18F258
• Description: High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
• Manufacturer: MICROCHIP [Microchip Technology]

17.4.7
In I
reload value is placed in the lower 7 bits of the
SSPADD register (Figure 17-17). When a write occurs
to SSPBUF, the baud rate generator will automatically
begin counting. The BRG counts down to 0 and stops
until another reload has taken place. The BRG count is
decremented twice per instruction cycle (T
Q2 and Q4 clocks. In I
reloaded automatically.
FIGURE 17-17:
TABLE 17-3:
 2002 Microchip Technology Inc.
Note 1: The I
2
C Master mode, the baud rate generator (BRG)
2: Actual frequency will depend on bus conditions.
10 MHz
10 MHz
10 MHz
100 kHz) in all details, but may be used with care where higher rates are required by the application.
4 MHz
4 MHz
4 MHz
1 MHz
1 MHz
1 MHz
BAUD RATE GENERATOR
F
CY
2
C interface does not conform to the 400 kHz I
I
2
C CLOCK RATE W/BRG
BAUD RATE GENERATOR BLOCK DIAGRAM
SSPM3:SSPM0
2
C Master mode, the BRG is
SCL
SSPM3:SSPM0
20 MHz
20 MHz
20 MHz
8 MHz
8 MHz
8 MHz
2 MHz
2 MHz
2 MHz
F
CY
CY
*2
) on the
Reload
Control
Preliminary
CLKO
Reload
2
Once the given operation is complete (i.e., transmis-
sion of the last data bit is followed by ACK), the internal
clock will automatically stop counting and the SCL pin
will remain in its last state.
Table 17-3 demonstrates clock rates based on
instruction cycles and the BRG value loaded into
SSPADD.
C specification (which applies to rates greater than
BRG Down Counter
SSPADD<6:0>
BRG Value
3Fh
0Ah
0Dh
0Ah
19h
20h
28h
03h
00h
F
PIC18FXX8
OSC
(2 Rollovers of BRG)
/4
400 kHz
400 kHz
333 kHz
312.5 kHz
1 MHz
308 kHz
DS41159B-page 167
100 kHz
100 kHz
100kHz
F
SCL
(2)
(1)
(1)
(1)
(1)