PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 219
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PIC18F258
Manufacturer Part Number
PIC18F258
Description
High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F258.pdf
(384 pages)
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REGISTER 19-31: BRGCON3 – BAUD RATE CONTROL REGISTER 3
19.2.5
This register controls the operation of the CAN module’s
I/O pins in relation to the rest of the microcontroller.
REGISTER 19-32: CIOCON – CAN I/O CONTROL REGISTER
2002 Microchip Technology Inc.
bit 7-6
bit 5
bit 4
bit 3-0
bit 7
bit 6
bit 5-3
bit 2-0
CAN MODULE I/O CONTROL
REGISTER
bit 7
bit 7
Unimplemented: Read as ‘0’
ENDRHI: Enable Drive High bit
1 = CANTX pin will drive V
0 = CANTX pin will tri-state when recessive
CANCAP: CAN Message Receive Capture Enable bit
1 = Enable CAN capture, CAN message receive signal replaces input on RC2/CCP1
0 = Disable CAN capture, RC2/CCP1 input to CCP1 module
Unimplemented: Read as ’0’
Legend:
R = Readable bit
- n = Value at POR
Unimplemented: Read as ’0’
WAKFIL: Selects CAN bus Line Filter for Wake-up bit
1 = Use CAN bus line filter for wake-up
0 = CAN bus line filter is not used for wake-up
Unimplemented: Read as ’0’
SEG2PH2:SEG2PH0: Phase Segment 2 Time Select bits
111 = Phase Segment 2 Time = 8 x T
110 = Phase Segment 2 Time = 7 x T
101 = Phase Segment 2 Time = 6 x T
100 = Phase Segment 2 Time = 5 x T
011 = Phase Segment 2 Time = 4 x T
010 = Phase Segment 2 Time = 3 x T
001 = Phase Segment 2 Time = 2 x T
000 = Phase Segment 2 Time = 1 x T
Legend:
R = Readable bit
- n = Value at POR
Note 1: Ignored if SEG2PHTS bit (BRGCON2<7>) is clear.
U-0
U-0
—
—
WAKFIL
R/W-0
U-0
—
U-0
ENDRHI
W = Writable bit
’1’ = Bit is set
W = Writable bit
’1’ = Bit is set
—
R/W-0
DD
Preliminary
when recessive
U-0
—
CANCAP
R/W-0
Q
Q
Q
Q
Q
Q
Q
Q
U-0
—
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-0
—
SEG2PH2
R/W-0
(1)
U-0
—
(1)
PIC18FXX8
SEG2PH1
R/W-0
x = Bit is unknown
x = Bit is unknown
U-0
—
DS41159B-page 217
(1)
SEG2PH0
R/W-0
U-0
—
bit 0
bit 0
(1)
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