PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 350

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PIC18F258

Manufacturer Part Number
PIC18F258
Description
High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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PIC18FXX8
TABLE 27-18: I
100
101
102
103
90
91
106
107
92
109
110
D102
Note 1: As a transmitter, the device must provide this internal minimum delay time to bridge the undefined region
DS41159B-page 348
Param
No.
2: A Fast mode I
T
T
T
T
T
T
T
T
T
T
T
C
(min. 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
T
LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL signal, it must
output the next data bit to the SDA line.
Before the SCL line is released, T
mode I
Symbol
SU
SU
SU
AA
HIGH
LOW
R
F
HD
HD
BUF
B
SU
:
:
:
:
:
STA
DAT
STO
STA
DAT
;
DAT
2
C bus specification).
2
C BUS DATA REQUIREMENTS (SLAVE MODE)
Clock high time
Clock low time
SDA and SCL rise
time
SDA and SCL fall
time
START condition
setup time
START condition
hold time
Data input hold
time
Data input setup
time
STOP condition
setup time
Output valid from
clock
Bus free time
Bus capacitive loading
250 ns must then be met. This will automatically be the case if the device does not stretch the
2
C bus device can be used in a Standard mode I
Characteristic
100 kHz mode
400 kHz mode
SSP Module
100 kHz mode
400 kHz mode
SSP module
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
R
max. + T
Preliminary
SU
;
DAT
20 + 0.1 C
20 + 0.1 C
= 1000 + 250 = 1250 ns (according to the Standard
1.5 T
1.5 T
Min
250
100
4.0
0.6
4.7
1.3
4.7
0.6
4.0
0.6
4.7
0.6
4.7
1.3
0
0
CY
CY
B
B
2
C bus system, but the requirement
1000
3500
Max
300
300
300
0.9
400
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
s
s
s
s
s
s
s
s
s
s
s
s
s
2002 Microchip Technology Inc.
PIC18FXX8 must operate
at a minimum of 1.5 MHz
PIC18FXX8 must operate
at a minimum of 10 MHz
PIC18FXX8 must operate
at a minimum of 1.5 MHz
PIC18FXX8 must operate
at a minimum of 10 MHz
C
10 to 400 pF
C
10 to 400 pF
Only relevant for Repeated
START condition
After this period the first
clock pulse is generated
(Note 2)
(Note 1)
Time the bus must be free
before a new transmission
can start
B
B
is specified to be from
is specified to be from
Conditions

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