PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 206
PIC18F258
Manufacturer Part Number
PIC18F258
Description
High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F258.pdf
(384 pages)
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PIC18FXX8
19.2.2
This section describes the CAN Transmit Buffer
registers and their associated control registers.
REGISTER 19-4:
DS41159B-page 204
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
CAN TRANSMIT BUFFER
REGISTERS
TXBnCON – TRANSMIT BUFFER n CONTROL REGISTERS
bit 7
Legend:
R = Readable bit
- n = Value at POR
Unimplemented: Read as ’0’
TXABT: Transmission Aborted Status bit
1 = Message was aborted
0 = Message was not aborted
TXLARB: Transmission Lost Arbitration Status bit
1 = Message lost arbitration while being sent
0 = Message did not lose arbitration while being sent
TXERR: Transmission Error Detected Status bit
1 = A bus error occurred while the message was being sent
0 = A bus error did not occur while the message was being sent
TXREQ: Transmit Request Status bit
1 = Requests sending a message. Clears the TXABT, TXLARB, and TXERR bits.
0 = Automatically cleared when the message is successfully sent
Note:
Unimplemented: Read as ’0’
TXPRI1:TXPRI0: Transmit Priority bits
11 = Priority Level 3 (Highest Priority)
10 = Priority Level 2
01 = Priority Level 1
00 = Priority Level 0 (Lowest Priority)
Note:
U-0
—
Clearing this bit in software while the bit is set, will request a message abort.
These bits set the order in which Transmit buffer will be transferred. They do not
alter CAN message identifier.
TXABT
R-0
TXLARB
W = Writable bit
’1’ = Bit is set
Preliminary
R-0
TXERR
R-0
TXREQ
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-0
—
2002 Microchip Technology Inc.
x = Bit is unknown
TXPRI1
R/W-0
TXPRI0
R/W-0
bit 0
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