PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 182
PIC18F258
Manufacturer Part Number
PIC18F258
Description
High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F258.pdf
(384 pages)
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PIC18FXX8
17.4.17.3
Bus collision occurs during a STOP condition if:
a)
b)
FIGURE 17-31:
FIGURE 17-32:
DS41159B-page 180
After the SDA pin has been de-asserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
After the SCL pin is de-asserted, SCL is sam-
pled low before SDA goes high.
SDA
SCL
PEN
BCLIF
P
SSPIF
SSPIF
BCLIF
SDA
PEN
SCL
Bus Collision During a STOP
Condition
P
BUS COLLISION DURING A STOP CONDITION (CASE 1)
BUS COLLISION DURING A STOP CONDITION (CASE 2)
Assert SDA
T
SDA asserted low
BRG
T
BRG
Preliminary
T
BRG
T
BRG
The STOP condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the baud rate generator is loaded with SSPADD<6:0>
and counts down to 0. After the BRG times out, SDA is
sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data ’0’ (Figure 17-31). If the SCL pin is sampled
low before SDA is allowed to float high, a bus collision
occurs. This is another case of another master
attempting to drive a data ’0’ (Figure 17-32).
SCL goes low before SDA goes high
Set BCLIF
T
BRG
T
BRG
2002 Microchip Technology Inc.
’0’
’0’
SDA sampled
low after T
Set BCLIF
’0’
’0’
BRG
,
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