LAN9218I_07 SMSC [SMSC Corporation], LAN9218I_07 Datasheet - Page 15

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LAN9218I_07

Manufacturer Part Number
LAN9218I_07
Description
High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Manufacturer
SMSC [SMSC Corporation]
Datasheet
High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Datasheet
SMSC
53,56-59,62-
SPEED_SEL
21-26,29-
43-46,49-
33,36-40
PIN NO.
12-18
LAN9218i
64
92
93
94
72
76
0
1
Host Data High
Host DataLow
Host Address
Read Strobe
Write Strobe
FIFO Select
Chip Select
Interrupt
Request
NAME
100Mbps
10Mbps
SPEED
FIFO_SEL
SYMBOL
Table 2.1 Host Bus Interface Signals
D[31:16]
Table 2.2 Default Ethernet Settings
D[15:0]
A[7:1]
nWR
nRD
nCS
IRQ
DATASHEET
DEFAULT ETHERNET SETTINGS
Half-Duplex
Half-Duplex
BUFFER
O8/OD8
DUPLEX
TYPE
(PD)
I/O8
I/O8
15
IS
IS
IS
IS
IS
PINS
16
16
#
7
1
1
1
1
1
Bi-directional data port.
Note that Pull-down’s are disabled in
32 bit mode.
Bi-directional data port.
7-bit Address Port. Used to select
Internal CSR’s and TX and RX FIFOs.
Active low strobe to indicate a read
cycle.
Active low strobe to indicate a write
cycle. This signal, qualified with nCS, is
also used to wakeup the LAN9218i
when it is in a reduced power state.
Active low signal used to qualify read
and write operations. This signal
qualified with nWR is also used to
wakeup the LAN9218i when it is in a
reduced power state.
Programmable Interrupt request.
Programmable polarity, source and
buffer types.
When driven high all accesses to the
LAN9218i are to the RX or TX Data
FIFOs. In this mode, the A[7:3] upper
address inputs are ignored.
DESCRIPTION
AUTO NEG.
Disabled
Enabled
Revision 1.8 (06-06-07)

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