LAN9218I_07 SMSC [SMSC Corporation], LAN9218I_07 Datasheet - Page 32
LAN9218I_07
Manufacturer Part Number
LAN9218I_07
Description
High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LAN9218I_07.pdf
(133 pages)
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Revision 1.8 (06-06-07)
3.8.2.1
EEDIO (OUTPUT)
EEDIO (INPUT)
EEDIO (OUTPUT)
EEDIO (INPUT)
EECLK
EECS
Supported EEPROM Operations
The EEPROM controller supports the following EEPROM operations under host control via the
E2P_CMD register. The operations are commonly supported by “93C46” EEPROM devices. A
description and functional timing diagram is provided below for each operation. Please refer to the
E2P_CMD register description in
page 92
ERASE (Erase Location): If erase/write operations are enabled in the EEPROM, this command will
erase the location selected by the EPC Address field (EPC_ADDR). The EPC_TO bit is set if the
EEPROM does not respond within 30ms.
ERAL (Erase All): If erase/write operations are enabled in the EEPROM, this command will initiate a
bulk erase of the entire EEPROM.The EPC_TO bit is set if the EEPROM does not respond within
30ms.
EECLK
EECS
for E2P_CMD field settings for each command.
1
1
0
Figure 3.3 EEPROM ERASE Cycle
Figure 3.4 EEPROM ERAL Cycle
High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
1
0
1
DATASHEET
Section 5.3.23, "E2P_CMD – EEPROM Command Register," on
1
A6
32
0
A0
t
CSL
t
CSL
SMSC
LAN9218i
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