LAN9218I_07 SMSC [SMSC Corporation], LAN9218I_07 Datasheet - Page 42

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LAN9218I_07

Manufacturer Part Number
LAN9218I_07
Description
High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Revision 1.8 (06-06-07)
3.11.1
TX Buffer Format
TX buffers exist in the host’s memory in a given format. The host writes a TX command word into the
TX data buffer before moving the Ethernet packet data. The TX command A and command B are 32-
bit values that are used by the LAN9218i in the handling and processing of the associated Ethernet
packet data buffer. Buffer alignment, segmentation and other packet processing parameters are
included in the command structure. The following diagram illustrates the buffer format.
Last Buffer in
Figure 3.11 Simplified Host TX Flow Diagram
Packet
High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
DATASHEET
Command
(optional)
available
Padding
Check
space
Buffer
Write
Write
Write
FIFO
Start
Idle
init
TX
42
TX Status
Available
Not Last Buffer
(optional)
Read TX
Status
SMSC
LAN9218i
Datasheet

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