TMC2072_07 SMSC [SMSC Corporation], TMC2072_07 Datasheet - Page 33
TMC2072_07
Manufacturer Part Number
TMC2072_07
Description
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.TMC2072_07.pdf
(106 pages)
- Current page: 33 of 106
- Download datasheet (653Kb)
Peripheral Mode CircLink™ Controller
Datasheet
2.6
2.6.1
SMSC TMC2072
Receiver:
The receiver rejects the packet and goes back to idle state.
CPU Interface
CPU Identification and Compatibility Between Intel and Motorola
Processors
The CircLink Controller, TMC2072, can be connected to any combination of CPUs listed in the Table 3.
For more information on setup, refer to section 1.5 - User Setup Pins.
Table 4 describes setup of pin functions of address bus/data, bus/read write controls by nRWM and nMUX
pins.
Remarks:
Symbol definition in Table 4:
D
A
AD
nWR
D15 - D6
D/AD5 - D/AD0
A5-A4
A3
A2
A1-A0
nWR/DIR
nRD/nDS
CLASSIFICATION ITEM
PIN NAME
Address Multiplexed
Data Bus width
Read / Write
Data Bus
Address Bus
Address / Data Bus
Write Signal (16 Bit CPU is nWRL)
Table 4- Distinction and Matching of the CPU type
AD5-AD0
NMUX=0
ALEPOL
D15-D6
DATASHEET
nWR
nRD
ALE
Table 3 - CPU Type
INTEL (80XX) TYPE
-
-
NRWM = 0
Non-MUX / Multiplexed
Page 33
DIR , nLDS(LDS)
nRD , nWRL
16 BIT CPU
8bit / 16bit
NMUX=1
D15-D6
D5-D0
OR
A5-A4
A1-A0
nWR
nRD
A3
A2
CONNECTION CPU TYPE
AD5-AD0
NMUX=0
ALEPOL
nDS(DS)
MOTOROLA (68XX) TYPE
D15-D6
ALE
DIR
-
-
Non-MUX / Multiplexed
NRWM=1
DIR , nDS(DS)
nRD , nWR
8 BIT CPU
8bit
OR
Revision 0.1 (06-07-07)
NMUX=1
nDS(DS)
D15-D6
D5-D0
A5-A4
A1-A0
DIR
A3
A2
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