TMC2072_07 SMSC [SMSC Corporation], TMC2072_07 Datasheet - Page 82
TMC2072_07
Manufacturer Part Number
TMC2072_07
Description
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.TMC2072_07.pdf
(106 pages)
- Current page: 82 of 106
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Supplement:
3.2.17 CMID register: Clock Master Node ID
Revision 0.1 (06-07-07)
Free-Format receive mode
[Flag definition]
[Clear condition]
Remote buffer receive mode
[Flag definition]
[Clear condition]
If the all-receive-inhibit bit, ECRI, in the mode register is returned from 1 to 0, all the receive flags return to
1 regardless of their receive mode.
In Free-Format receive mode regarding receive flags RXF31 to RXF1, the flags become 1 after receive
completion and 0 after clearance upon data readout. The clearance is executed by writing “1” in object bits.
This section explains how “writing 1” can clear the bits (flags) that become active by “1.” (This description
is applicable in flag clearing of interrupt status register.)
The basic idea is that direct writing of the readout data in a register can clear the bits that have been “1.”
For example, the readout data of the RXFH register (higher receive flag) is 01h; in this case, the data
means receive completion of page #16. After that, if the readout data, 01h, is written in the RXFH register,
only the RXF 16 bit is cleared. Therefore, the bit in the RXFH register that is set after the RXFH register
readout is not cleared by mistake. The important point is that the bits subject to be cleared are the bits of
which the CPU recognizes as “1.”
CMID 4-0 (bits 4 to 0)
These bits specify IDs of the clock master node, standard node of the network standard time (NST). If a
packet is received from the node set, the NST is loaded. If 0 is set, loading is not executed.
CMID
Clearance by writing “1” of receive flag
15-5
4-0
bit
name
--------
CMID4-0
1: Receive completed/Unauthorized
0: Receive authorized
Writing “1”, or last data readout of corresponding page only in nACLR = 0
1: Receive within a fixed time period
0: No receive within a fixed time period.
Writing 0Ah (WARTERR clear command) in the ECCMD register, or OK in the
warning monitoring result
DATASHEET
init. value
all "0"
--
Page 82
description
reserved (all "0")
Clock Master Node ID
Peripheral Mode CircLink™ Controller
address: 20h
(Read/Write)
SMSC TMC2072
Datasheet
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