TMC2072_07 SMSC [SMSC Corporation], TMC2072_07 Datasheet - Page 78
TMC2072_07
Manufacturer Part Number
TMC2072_07
Description
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.TMC2072_07.pdf
(106 pages)
- Current page: 78 of 106
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3.2.11 INTMSK Register: EC Interrupt Mask
3.2.12 ECCMD Register: EC Command Register
Revision 0.1 (06-07-07)
This bit is set if sending fails. Be aware that this function is the opposite of that of the ARCNET-original
TMA bit. This bit is cleared by writing a 1 , issuing the send command, or by a software reset.
TA (bit 0)
This bit is the same as the TA bit of the COMR0: ARCNET status register. (Refer to that register for
details.) This bit becomes 0 only during the send command issuing.
Combination and meaning of transmission status
This register corresponds to interrupt status, and being set to 1, the interrupt signal becomes active when
the corresponding status becomes 1.
ECCMD 7-0 (bits 7 to 0)
This command is unique to CircLink when the bus width is 8 bits (W16 = 0), access to higher bytes is
invalid; the command is executed by access to the lower bytes. When the bus width is 16 bits (W16 = 1),
INTMSK
ECCMD
TA
0
1
1
1
15-8
7-0
bit
15
14
13
12
11
10
bit
9
8
7
6
5
4
3
2
1
0
TXERR
X
0
1
1
name
--------
ECCMD7-0
name
RXERR
CMIECC
NSTUNLOC
WARTERR
FRCV
RRCV
MRCV
SIDF
TKNRETF
ACKNAKF
HUBWDTO
CPERR
COM
FBENR
TXERR
TA
FBENR
X
0
0
1
DATASHEET
init. value description
00h
Transmitting
Transmit complete
Transmit Error by data error
Transmit Error by FBE unanswer
0
init. value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Page 78
reserved (all "0")
EC Command
description
Receiver Error
CMI RX Error Correction occurred
NST Unlock
Warning Timer Error
Free-format mode Received
Remote-buffer mode Received
My Received
SID Found
Token Retry occurred
Corrupt ACK/NAK Recovered
HUB Watch Dog Timer time-out
TX CP Error
ARCNET CORE Interrupt
FBE No Reply
Transmitter Error
Transmitter Available
Meaning
Peripheral Mode CircLink™ Controller
(Read/Write)
address:16h
(Read/Write)
address:14h
SMSC TMC2072
Datasheet
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