TMC2072_07 SMSC [SMSC Corporation], TMC2072_07 Datasheet - Page 34
TMC2072_07
Manufacturer Part Number
TMC2072_07
Description
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.TMC2072_07.pdf
(106 pages)
- Current page: 34 of 106
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2.6.2
1)
2)
Revision 0.1 (06-07-07)
Data Strobe signal using Motorola 16-bit CPU
When executing word (16 bit) access to odd addresses by DIR and data strobe signals, the Motorola CPU does
not discriminate between upper and lower data strobe signals. Because of this, it is necessary to OR the upper
and lower data strobe signals to provide the data strobe input.
Note on data send
When transmitting and receiving data of 8 bits and 16 bits, the transmitter node can send odd-numbered bytes
but the receiving node can only implement word access (16-bit), the word is read with one invalid upper data
byte. To use the receive data function in a system, special care must be taken. This problem occurs only when
the CP field value in the packet is an odd number.
nRD
DIR
nDS(DS)
ALE
ALEPOL
Interface Restrictions
Read Signal
Read / Write Signal
Data Strobe Signal (16 Bit CPU is nLDS) (Polarity is designated by nDSINV pin)
Address Latch Enable Signal
Designate ALE polarity
DATASHEET
Page 34
Peripheral Mode CircLink™ Controller
SMSC TMC2072
Datasheet
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