FDC37C669_07 SMSC [SMSC Corporation], FDC37C669_07 Datasheet - Page 134
FDC37C669_07
Manufacturer Part Number
FDC37C669_07
Description
PC 98/99 Compliant Super I/O Floppy Disk Controller with Infrared Support
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.FDC37C669_07.pdf
(164 pages)
- Current page: 134 of 164
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CR24
This register can only be accessed in the
Configuration Mode and after the CSR has been
initialized to 25H. The default value of this
register after power up is 00H. This register is
used to select the base address of UART1
(serial port 1). The serial port can be set to 96
CR25
This register can only be accessed in the
Configuration Mode and after the CSR has been
initialized to 25H.
register after power up is 00H. This register is
used to select the base address of UART2
(serial port 2). The serial port can be set to 96
CR26
This register can only be accessed in the
Configuration Mode and after the CSR has been
initialized to 26H. The default value of this
ADR9
ADR9
DB7
DB7
ADR8
ADR8
DB6
DB6
The default value of this
ADR7
ADR7
DB5
DB5
D3-D0
D7-D4
0000
0001
0010
0011
ADR6
ADR6
DB4
DB4
134
DMA Selected
locations, on 8 byte boundaries from 100H-
3F8H.
and ADR8 to zero.
Upper Address Decode requirements : nCS='0'
and A10='0' are required to access UART1
registers. A[2:0] are decoded as XXXb.
locations, on 8 byte boundaries from 100H-
3F8H.
and ADR8 to zero.
Upper Address Decode requirements : nCS='0'
and A10='0' are required to access UART2
registers. A[2:0] are decoded as XXXb.
register after power up is 00H. This register is
used to select the DMA for the FDC (Bits 4:7)
and the parallel port (bits 3:0). Any unselected
DMA REQ output is in tristate.
ADR5
ADR5
DB3
DB3
DMA_C
DMA_A
DMA_B
None
To disable the serial port, set ADR9
To disable the serial port, set ADR9
ADR4
ADR4
DB2
DB2
ADR3
ADR3
DB1
DB1
DB0
DB0
0
0
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