LPC47M182-NR SMSC [SMSC Corporation], LPC47M182-NR Datasheet - Page 153

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LPC47M182-NR

Manufacturer Part Number
LPC47M182-NR
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC [SMSC Corporation]
Datasheet

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Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Note:
This follows the boolean equation:
(nAUD_LNK_RST)x( nCDC_DWN_ENAB )=nCDC_DWN_RST
See Table 13.6 for CNR timing.
SMSC LPC47M182
If GP24 is programmed as GPIO output the GP data bit will also control nCDC_DWN_ENAB input to the
CNR logic.
nAUD_LNK_RST
power. The polarity bit will affect the output and input to the CNR logic. The output type select bit will
also affect the GP24 pin.
If GP24 is programmed as GPIO input, it will not affect the nCDC_DWN_ENAB input into the CNR
logic. It will function as a normal GPIO input and can be used as a PME event.
NAUD_LNK_RST
0
0
1
1
10k
Table 7.49 – CNR Logic Truth Table
INPUTS
DATASHEET
Figure 7.19 – CNR Circuit
NCDC_DWN_ENAB
Powered by VTR (3.3V)
(NOTE)
SMSC I/O
153
0
1
0
1
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
nCDC_DWN_RST
OUTPUT
nCDC_DWN_RST
0
0
1
0

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