LPC47M182-NR SMSC [SMSC Corporation], LPC47M182-NR Datasheet - Page 58

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LPC47M182-NR

Manufacturer Part Number
LPC47M182-NR
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC [SMSC Corporation]
Datasheet

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Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
SYMBOL
WGATE
SRT
ST0
ST1
ST2
ST3
Step Rate Interval The time interval between step pulses issued by the FDC.
Write Gate
Status 0
Status 1
Status 2
Status 3
NAME
Programmable from 0.5 to 8 milliseconds in increments of 0.5 ms at
the 1 Mbit data rate. Refer to the SPECIFY command for actual
delays.
Registers within the FDC which store status information after a
command has been executed. This status information is available to
the host during the result phase after command execution.
Alters timing of WE to allow for pre-erase loads in perpendicular
drives.
DATASHEET
58
DESCRIPTION
Advanced I/O Controller with Motherboard GLUE Logic
SMSC LPC47M182
Datasheet

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