SAK-TC1197-256F180E INFINEON [Infineon Technologies AG], SAK-TC1197-256F180E Datasheet - Page 177

• Manufacturer Part Number: SAK-TC1197-256F180E
• Description: 32-Bit Single-Chip Microcontroller
• Manufacturer: INFINEON [Infineon Technologies AG]

5.3.10.3 SSC Master/Slave Mode Timing
Table 30
Parameter
Master Mode Timing
SCLK clock period
MTSR/SLSOx delay from
SCLK rising edge
MRST setup to SCLK
falling edge
MRST hold from SCLK
falling edge
Slave Mode Timing
SCLK clock period
SCLK duty cycle
MTSR setup to SCLK
latching edge
MTSR hold from SCLK
latching edge
SLSI setup to first SCLK
shift edge
SLSI hold from last SCLK
latching edge
MRST delay from SCLK
shift edge
SLSI to valid data on MRST
1) SCLK signal rise/fall times are the same as the A2 Pads rise/fall times.
2) SCLK signal high and low times can be minimum 1 ×
3)
4) Fractional divider switched off, SSC internal baud rate generation used.
Data Sheet
T
SSCmin
=
T
SYS
= 1/
SSC Master/Slave Mode Timing
(Operating Conditions apply), C
f
SYS
. When
f
SYS
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
= 90 MHz,
50
51
52
53
54
55
56
57
58
59
60
61
/
t
54
CC
CC 2 ×
SR 13
SR 0
SR 4 ×
SR
SR
SR
SR 7
CC 0
CC –
SR 45
t
50
= 22.2 ns.
Min.
0
T
T
T
173
SSC
SSC
SSC
T
T
T
SSC
SSC
SSC
+ 5
+ 5
+ 5
L
= 50 pF
.
Values
Typ. Max.
–
–
–
–
–
–
–
–
–
–
–
–
–
8
–
–
–
55
–
–
–
–
15
12
Electrical Parameters
ns
ns
ns
ns
ns
%
ns
ns
ns
ns
Unit Note /
ns
ns
V1.1, 2009-05
Test Con
dition
1)2)3)
–
3)
3)
1)3)
–
3)4)
3)4)
3)
–
–
–
TC1197