HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 149
HD6413008F
Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6413008F.pdf
(686 pages)
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Bits 7 to 0—Area 7 to 0 Bus Width Control (ABW7 to ABW0): These bits select 8-bit access
or 16-bit access for the corresponding areas.
Bits 7 to 0
ABW7 to ABW0
0
1
ABWCR specifies the data bus width of external memory areas. The data bus width of on-chip
memory and registers is fixed, and does not depend on ABWCR settings.
6.2.2
ASTCR is an 8-bit readable/writable register that selects whether each area is accessed in two
states or three states.
ASTCR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 0—Area 7 to 0 Access State Control (AST7 to AST0): These bits select whether the
corresponding area is accessed in two or three states.
Bits 7 to 0
AST7 to AST0
0
1
ASTCR specifies the number of states in which external areas are accessed. On-chip memory and
registers are accessed in a fixed number of states that does not depend on ASTCR settings.
Bit
Initial value
Read/Write
Access State Control Register (ASTCR)
AST7
R/W
7
1
Description
Areas 7 to 0 are 16-bit access areas
Areas 7 to 0 are 8-bit access areas
Description
Areas 7 to 0 are accessed in two states
Areas 7 to 0 are accessed in three states
AST6
R/W
6
1
Bits selecting number of states for access to each area
AST5
R/W
5
1
AST4
R/W
4
1
Rev.4.00 Aug. 20, 2007 Page 105 of 638
AST3
R/W
3
1
AST2
R/W
2
1
AST1
REJ09B0395-0400
R/W
6. Bus Controller
1
1
(Initial value)
AST0
R/W
0
1
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