HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 671

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HD6413008F

Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Timing of Transition to Hardware Standby Mode
1. To retain RAM contents with the RAME bit set to 1 in SYSCR, drive the RES signal low 10
2. To retain RAM contents with the RAME bit cleared to 0 in SYSCR, RES does not have to be
Timing of Recovery from Hardware Standby Mode: Drive the RES signal low approximately
100 ns before STBY goes high.
STBY
RES
STBY
RES
Appendix E Timing of Transition to and Recovery from
system clock cycles before the STBY signal goes low, as shown below. RES must remain low
until STBY goes low (minimum delay from STBY low to RES high: 0 ns).
driven low as in (1).
Appendix E Timing of Transition to and Recovery from Hardware Standby Mode
Hardware Standby Mode
t
1
t ≥ 100 ns
≥ 10t
cyc
t
2
≥ 0 ns
Rev.4.00 Aug. 20, 2007 Page 627 of 638
t
OSC
REJ09B0395-0400

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