HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 440

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HD6413008F

Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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13. Smart Card Interface
13.3.5
Only an internal clock generated by the on-chip baud rate generator can be used as the
transmit/receive clock for the smart card interface. The bit rate is set with the bit rate register
(BRR) and the CKS1 and CKS0 bits in the serial mode register (SMR). The equation for
calculating the bit rate is shown below. Table 13.5 shows some sample bit rates.
If clock output is selected with CKE0 set to 1, a clock with a frequency of 372 times the bit rate is
output from the SCK pin.
where, N: BRR setting (0 ≤ N ≤ 255)
Table 13.4 n-Values of CKS1 and CKS0 Settings
n
0
1
2
3
Note: If the gear function is used to divide the clock frequency, use the divided frequency to
Table 13.5 Bit Rates (bits/s) for Various BRR Settings (When n = 0)
N
0
1
2
Note: Bit rates are rounded off to two decimal places.
Rev.4.00 Aug. 20, 2007 Page 396 of 638
REJ09B0395-0400
7.1424
9600.0
4800.0
3200.0
B: Bit rate (bit/s)
φ: Operating frequency (MHz)
n: See table 13.4
calculate the bit rate. The equation above applies directly to 1/1 frequency division.
B =
Clock
1488 × 2
10.00
13440.9 14400.0 17473.1 19200.0 21505.4 24193.5 26881.7 33602.2
6720.4
4480.3
CKS1
0
1
2n−1
φ
10.7136 13.00
7200.0
4800.0
× (N + 1)
CKS0
0
1
0
1
8736.6
5824.4
× 10
6
14.2848 16.00
9600.0
6400.0
φ (MHz)
10752.7 12096.8 13440.9 16801.1
7168.5
18.00
8064.5
20.00
8960.6
25.00
11200.7

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