HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 669

• Manufacturer Part Number: HD6413008F
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
• Manufacturer: RENESAS [Renesas Technology Corp]

D.2
Modes 1 and 2: Figure D.1 is a timing diagram for the case in which RES goes low during an
external memory access in mode 1 or 2. As soon as RES goes low, all ports are initialized to the
input state. AS, RD, HWR, LWR, and CS
The address bus is initialized to the low output level 2.5 φ clock cycles after the low level of RES
is sampled. Clock pin P6
P6
RES
Internal reset
signal
A
CS
AS, RD
(read)
HWR, LWR
(write)
D
(write)
I/O port,
CS
19
15
7
0
7
Pin States at Reset
/φ
to A
to D
to CS
0
0
1
Figure D.1 Reset during Memory Access (Modes 1 and 2)
7
/φ goes to the output state at the next rise of φ after RES goes low.
Access to external
T
1
memory
0
go high, and D
T
2
T
3
Rev.4.00 Aug. 20, 2007 Page 625 of 638
15
to D
0
go to the high-impedance state.
High impedance
High impedance
H'00000
Appendix D Pin States
REJ09B0395-0400