HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 410

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HD6413008F

Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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12. Serial Communication Interface
Rev.4.00 Aug. 20, 2007 Page 366 of 638
REJ09B0395-0400
Figure 12.12 Sample Flowchart for Receiving Multiprocessor Serial Data (1)
No
No
No
Read ORER and FER flags
Read ORER and FER flags
Read receive data from RDR
Set MPIE bit to 1 in SCR
Read RDRF flag in SSR
Read RDRF flag in SSR
Clear RE bit to 0 in SCR
Read RDRF flag in SSR
Finished receiving?
FER∨ORER = 1
FER∨ORER = 1
Start receiving
RDRF = 1
RDRF = 1
Own ID?
Initialize
in SSR
in SSR
<End>
Yes
Yes
Yes
Yes
No
No
Yes
No
Yes
Error handling
(1)
(2)
(3)
(continued on next page)
(4)
(5)
(1)
(2)
(3)
(4)
(5)
SCI initialization:
the receive data input function of the
RxD pin is selected automatically.
ID receive cycle:
set the MPIE bit to 1 in SCR.
SCI status check and ID check:
read SSR, check that the RDRF flag
is set to 1, then read data from RDR
and compare it with the processor's
own ID. If the ID does not match, set
the MPIE bit to 1 again and clear the
RDRF flag to 0. If the ID matches,
clear the RDRF flag to 0.
SCI status check and data receiving:
read SSR, check that the RDRF flag
is set to 1, then read data from RDR.
Receive error handling and break
detection:
if a receive error occurs, read the
ORER and FER flags in SSR to
identify the error. After executing the
necessary error handling, clear the
ORER and FER flags both to 0.
Receiving cannot resume while either
the ORER or FER flag remains set to
1. When a framing error occurs, the
RxD pin can be read to detect the
break state.

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