HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 597
HD6413008F
Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6413008F.pdf
(686 pages)
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BCR—Bus Control Register
Initial value
Read/Write
Notes: 1. These bits can be read and written, but must not be set to 1. Normal operation cannot be guaranteed
2. 0 must not be written in bit 2.
Bit
Idle cycle insertion 1
if 1 is written in these bits.
0
1
ICIS1
R/W
7
1
No idle cycle is inserted in case of consecutive external read cycles for different areas
Idle cycle is inserted in case of consecutive external read cycles for different areas
Idle cycle insertion 0
0
1
ICIS0
No idle cycle is inserted in case of consecutive external read and write cycles
Idle cycle is inserted in case of consecutive external read and write cycles
R/W
6
1
0*
⎯
⎯
5
1
0*
⎯
⎯
4
1
0*
⎯
⎯
3
1
Area division unit select
0
1
1*
⎯
⎯
2
Rev.4.00 Aug. 20, 2007 Page 553 of 638
2
H'EE024
Area divisions are as follows:
Areas 0 to 7 are the same size
(2 Mbytes)
Area 0: 2 Mbytes
Area 1: 2 Mbytes
Area 2: 8 Mbytes
Area 3: 2 Mbytes
RDEA
R/W
Appendix B Internal I/O Registers
1
1
Wait pin enable
0
1
WAITE
R/W
WAIT pin wait input is disabled
WAIT pin wait input is enabled
0
0
Area 4: 1.93 Mbytes
Area 5: 4 kbytes
Area 6: 23.75 kbytes
Area 7: 22 bytes
REJ09B0395-0400
Bus controller
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