HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 6

• Manufacturer Part Number: HD6417616
• Description: 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Item
10.2.8
Transmit/Receive
Status Copy Enable
Register (TRSCER)
10.3.1 Descriptor
List and Data Buffers
Transmit Descriptor 0
(TD0)
Rev. 2.00 Mar 09, 2006 page vi of xxvi
Page
437
450
Revision (See Manual for Details)
Description amended
Description amended
Bit 27—Transmit Frame Error (TFE): Indicates that one or other bit of the transmit frame status
indicated by bits 26 to 0 is set.
Bit 27: TFE
0
1
Bits 26 to 0—Transmit Frame Status 26 to 0 (TFS26 to TFS0): These bits indicate the error status
during frame transmission.
Bits 31 to 8—Reserved These bits are always read as 0. The write value should always be 0.
Bit 7—Multicast Address Frame Receive (RMAF): Bit Copy Enable (RMAFCE)
Bit 7: RMAFCE
0
1
Bits 6 to 0—Reserved: These bits are always read as 0. The write value should always be 0.
TFS26 to
TFS8—Teransmit Abort Detect
Note: This bit is set to 1 wh
TFS7 to TFS5—Reserved
Initial value:
Initial value:
Initial value:
set, the Transmit Frame Error bit (bit 27: TFE) is set to 1.
R/W:
R/W:
R/W:
TFS9
Bit:
Bit:
Bit:
RMAFCE
—Reserved
Description
Enables the RMAF bit status to be indicated in the RFS7 bit in the receive
descriptor.
Disables occurrence of corresponding source to be indicated in the RFS7 bit in
the receive descriptor.
Description
No error during transmission
An error of some kind occurred during transmission (see bits 26 to 0)
R/W
31
—
15
—
R
R
0
0
7
0
30
14
—
—
—
R
R
R
0
0
6
0
en
any of Transmit Frame Status bits 4 to 0 is set. When this bit is
29
13
—
—
—
R
R
R
0
0
5
0
. . .
. . .
. . .
. . .
12
—
—
R
R
0
4
0
19
11
—
—
—
R
R
R
0
0
3
0
18
—
10
—
—
R
R
R
0
0
2
0
17
—
—
—
R
R
R
0
9
0
1
0
16
—
—
—
R
R
R
0
8
0
0
0