HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 802
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HD6417616
Manufacturer Part Number
HD6417616
Description
32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417616.pdf
(935 pages)
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Section 18 User Debug Interface (H-UDI)
EXTEST: This instruction is provided to test external circuitry when the SH7616 is mounted on a
printed circuit board. When this instruction is executed, output pins are used to output test data
(previously set by the SAMPLE/PRELOAD instruction) from the boundary scan register to the
printed circuit board, and input pins are used to latch test results into the boundary scan register
from the printed circuit board. If testing is carried out by using the EXTEST instruction N times,
the Nth test data is scanned-in when test data (N-1) is scanned out.
Data loaded into the output pin boundary scan register in the Capture-DR state is not used for
external circuit testing (it is replaced by a shift operation).
The instruction code is 0000.
CLAMP: When the CLAMP instruction is enabled, the output pin outputs the value of the
boundary scan register that has been set by the SAMPLE/PRELOAD instruction. While the
CLAMP instruction is enabled, the state of the boundary scan register maintains the previous state
regardless of the state of the TAP controller.
A bypass register is connected between TDI and TDO. The related circuit operates in the same
way when the BYPASS instruction is enabled.
The instruction code is 0010.
HIGHZ: When the HIGHZ instruction is enabled, all output pins enter a high-impedance state.
While the HIGHZ instruction is enabled, the state of the boundary scan register maintains the
previous state regardless of the state of the TAP controller.
A bypass register is connected between TDI and TDO. The related circuit operates in the same
way when the BYPASS instruction is enabled.
The instruction code is 0010.
IDCODE: When the IDCODE instruction is enabled, the value of the ID code register is output
from TDO with LSB first when the TAP controller is in the Shift-DR state. While this instruction
is being executed, the test circuit does not affect the system circuit.
When the TAP controller is in the Test-Logic-Reset state, the instruction register is initialized to
the IDCODE instruction.
The instruction code is 0010.
Rev. 2.00 Mar 09, 2006 page 776 of 906
REJ09B0292-0200
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