HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 624
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HD6417616
Manufacturer Part Number
HD6417616
Description
32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417616.pdf
(935 pages)
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Section 14 Serial Communication Interface with FIFO (SCIF)
Rev. 2.00 Mar 09, 2006 page 598 of 906
REJ09B0292-0200
Write {16 – (transmit trigger set
TDFE bit to 0 in SC1SSR after
Clear TE bit to 0 in SCSCR,
data to SCFTDR, and clear
Read TEND bit in SC1SSR
Read TDFE bit in SC1SSR
number)} bytes of transmit
and set TxD pin as output
Start of transmission
All data transmitted?
End of transmission
reading TDFE = 1
Break output?
Clear DR to 0
port with PFC
Initialization
TEND = 1?
TDFE = 1?
Yes
Yes
Yes
Yes
Figure 14.5 Sample Serial Transmission Flowchart
3
4
No
No
No
No
1
2
1. PFC initialization: Set the TxD pin, and
2. SCIF status check and transmit data
3. Serial transmission continuation
4. Break output at the end of serial
In steps 2 and 3, the number of transmit data
bytes that can be written can be ascertained
from the number of transmit data bytes in
SCFTDR indicated in the upper 8 bits of the
FIFO data count register (SCFDR).
the SCK pin if necessary, with the PFC.
write: Read the serial status 1 register
(SC1SSR) and check that the TDFE bit is
set to 1, then write transmit data to the
transmit FIFO data register (SCFTDR)
and clear the TDFE bit to 0 after reading
TDFE = 1. The TEND bit is cleared
automatically when transmission is
started by writing transmit data.
The number of data bytes that can be
written is {16 – (transmit trigger set
number)}.
procedure: To continue serial
transmission, read 1 from the TDFE bit to
confirm that writing is possible, then write
data to SCFTDR, and then clear the
TDFE bit to 0. (Checking and clearing of
the TDFE bit is automatic when the
DMAC is activated by a transmit-FIFO-
data-empty interrupt (TXI) request, and
data is written to SCFTDR.)
transmission: To output a break in serial
transmission, clear the port data register
(DR) to 0, then clear the TE bit to 0 in
SCSCR, and set the TxD pin as an output
port with the PFC.
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