HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 29

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 25 User Break Controller
Figure 25.1 Block Diagram of User Break Controller................................................................ 656
Section 26 User Debugging Interface (H-UDI)
Figure 26.1 Block Diagram of H-UDI........................................................................................ 683
Figure 26.2 TAP Controller State Transitions ............................................................................ 692
Figure 26.3 H-UDI Data Transfer Timing.................................................................................. 693
Figure 26.4 Example of Connecting Reset Signals without Mutual Interference....................... 696
Section 28 Electrical Characteristics
Figure 28.1 EXTAL Clock Input Timing ................................................................................... 737
Figure 28.2 CKIO Clock Input Timing....................................................................................... 737
Figure 28.3 CKIO Clock Output Timing.................................................................................... 737
Figure 28.4 Power-On Oscillation Settling Time ....................................................................... 737
Figure 28.5 Oscillation Settling Time on Return from Standby (Return by Reset) .................... 738
Figure 28.6 Oscillation Settling Time on Return from Standby (Return by NMI or IRQ) ......... 738
Figure 28.7 PLL Synchronization Settling Time at Power-On Reset ......................................... 738
Figure 28.8 PLL Synchronization Settling Time in Case of Reset or NMI Interrupt ................. 739
Figure 28.9 Reset and BOOT-E Input Timing............................................................................ 741
Figure 28.10 Interrupt Signal Input Timing................................................................................ 741
Figure 28.11 IRQOUT Timing ................................................................................................... 741
Figure 28.12 REFOUT Timing................................................................................................... 742
Figure 28.13 Bus Release Timing............................................................................................... 742
Figure 28.14 Pin Drive Timing at Standby................................................................................. 742
Figure 28.15 Basic Bus Cycle in Normal Space (No Wait)........................................................ 745
Figure 28.16 Basic Bus Cycle in Normal Space (Software Wait 1) ........................................... 746
Figure 28.17 Basic Bus Cycle in Normal Space (Asynchronous External Wait 1 Input)........... 747
Figure 28.18 Basic Bus Cycle in Normal Space (Software Wait 1, Asynchronous External Wait
Figure 28.19 CS Extended Bus Cycle in Normal Space
Figure 28.20 Bus Cycle of SRAM with Byte Selection
Figure 28.21 Bus Cycle of SRAM with Byte Selection
Figure 28.22 Read Bus Cycle of Burst ROM (Software Wait 1, Asynchronous External Wait 1
Figure 28.23 Single Read Bus Cycle of Synchronous DRAM
Figure 28.24 Single Read Bus Cycle of Synchronous DRAM
Valid (WM Bit = 0), No Idle Cycle)...................................................................... 748
(SW = 1 Cycle, HW = 1 Cycle, Asynchronous External Wait 1 Input) ................ 749
(SW = 1 Cycle, HW = 1 Cycle, Asynchronous External Wait 1 Input,
BAS = 0 (UB and LB in Write Cycle Controlled)) ............................................... 750
(SW = 1 Cycle, HW = 1 Cycle, Asynchronous External Wait 1 Input,
BAS = 1 (WE in Write Cycle Controlled))............................................................ 751
Input, Burst Wait 1, Number of Burst 2) ............................................................... 752
(Auto Precharge Mode, CAS Latency 2, TRCD = 1 Cycle, TRP = 1 Cycle) ........ 753
(Auto Precharge Mode, CAS Latency 2, TRCD = 2 Cycle, TRP = 2 Cycle) ........ 754
Rev. 1.00, 02/04, page xxix of xxxviii

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