HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 426
HD6417660
Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417660.pdf
(846 pages)
- Current page: 426 of 846
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Rev. 1.00, 02/04, page 388 of 804
Bit
9
8
7 to 2
Bit Name
TXE
RXE
—
Initial
Value
0
0
All 0
R/W
R/W
R/W
R
Description
Transmit Enable
0: Disables data transmission from the SIOFTXD pin
1: Enables data transmission from the SIOFTXD pin
•
•
•
This bit is initialized in module stop mode.
Receive Enable
0: Disables data reception from SIOFRXD
1: Enables data reception from SIOFRXD
•
•
•
This bit is initialized in module stop mode.
Reserved
These bits are always read as 0. The write value should
always be 0. If 1 is written to these bits, the operation is
not guaranteed.
This bit setting becomes valid at the start of the next
frame (at the rising edge of the SIOFSYNC signal).
When the 1 setting for this bit becomes valid, the
SIOF issues a transmit transfer request according to
the setting of the TFWM bit in SIFCTR. When
transmit data is stored in the transmit FIFO,
transmission of data from the SIOFTXD pin begins.
This bit is initialized upon a transmit reset.
This bit setting becomes valid at the start of the next
frame (at the rising edge of the SIOFSYNC signal).
When the 1 setting for this bit becomes valid, the
SIOF begins the reception of data from the
SIOFRXD pin. When receive data is stored in the
receive FIFO, the SIOF issues a reception transfer
request according to the setting of the RFWM bit in
SIFCTR.
This bit is initialized upon receive reset.
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