PSB7238 SIEMENS [Siemens Semiconductor Group], PSB7238 Datasheet - Page 104

• Manufacturer Part Number: PSB7238
• Description: Joint Audio Decoder-Encoder - Multimode
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Semiconductor Group
HDLC Channel 2 Transmit Path Register
Value after reset: 00
SLIN(1-0)
LMOD(1-0)
HHX
Select Line
00
01
10
11
Load Mode
00
XX
Host HDLC Transmitter Access
0
1
H
Channel on DU (frame sync FSC, clock DCL or DCL/2)
Channel on DD (frame sync FSC, clock DCL or DCL/2)
Channel on SR (frame sync RFS, clock SCLK)
Channel on ST (frame sync TFS, clock SCLK)
When shift register is about to become empty, it (as well as DSP
and Host read registers) is loaded from HDLC transmitter.
When shift register contains n bytes (XX = 01: n =1; XX = 10:
n = 2; XX = 11: n = 4), the contents is loaded into DSP and .ost
read register, DSP or .ost (cf. HHR bit) write register is loaded
into HDLC receive buffer, and read DSP or .ost read register is
loaded into DSP or .ost write register (for software to be
accessed via a “Buffer Empty” interrupt status).
DSP has access to modify HDLC transmitter output (monitoring
of HDLC output from host still possible).
Host has access to modify HDLC receiver input (monitoring of
HDLC output from DSP still possible).
104
Read/Write
Register Description
Data Sheet 1998-07-01
Address 2020
PSB 7238
H