PSB7238 SIEMENS [Siemens Semiconductor Group], PSB7238 Datasheet - Page 124

• Manufacturer Part Number: PSB7238
• Description: Joint Audio Decoder-Encoder - Multimode
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Semiconductor Group
TSCO
TFDIS
Time-Slot Assignment Receive
TSAR
TSR
RCS
Transmit Time-Slot Continuous
Transmit Frame Sync Disregard
When TSCO is equal to one, the time-slot capacity (normally given by
register XCCR, between 1 and 256 bits) is “infinity”. This means that the
time-slot will be always “active” so that data can be permanently transmitted
if XAC = 1.
If TFDIS = 0, and if the time-slot count logic has been reset (by issuing
XRES while XAC = 0), time-slot logic can start operation and thus “activate”
a time-slot only after the first frame sync pulse is detected (i.e. on FSC, RFS,
or TFS, whichever has been selected). The time-slot offset register
TSAX + bit XCS0 mark the instant when the “infinite” time-slot will be
activated after the first frame sync pulse has occurred. If TFDIS = 1,
transmission can start immediately, without the necessity to wait for the first
frame sync pulse.
When TFDIS is ‘1’, the time-slot generation logic disregards frame syncs. In
particular, if TFDIS = 1, transmit time-slot is immediately considered as
permanently “active”, and remains activated as long as this condition
prevails, independent of TSCO.
Time-Slot Receive
Selects one of up to 64 possible time-slots (00
received. TSR gives the location of the time-slot in octets
(granularity = octet). The bits RCS(2-0) give the exact starting point of the
time-slot with one-bit precision. In other words, the time-slot position with
respect to the frame sync is given by (TSR 8 + RCS). The length of the
time-slot is given by RCC(7-0).
Receive Clock Shift
Together with RCS0, RCS1 and RCS2 mark the start of the time-slot with
one-bit granularity.
TSR5
Bit 7
TSR4
TSR3
TSAR
TSR2
124
TSR1
Read/Write
H
- 3F
TSR0
H
) in which data is
Register Description
Data Sheet 1998-07-01
RCS2
Address 28
PSB 7238
RCS1
Bit 0
H