PSB7238 SIEMENS [Siemens Semiconductor Group], PSB7238 Datasheet - Page 51

• Manufacturer Part Number: PSB7238
• Description: Joint Audio Decoder-Encoder - Multimode
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Audio Channel Transfer
As mentioned in Section 3, all the serial channels (2 receive audio, 2 transmit audio, and
two full-duplex HDLC/transparent data channels) can be transferred between one of the
serial interfaces and the DSP or the host in a flexible manner.
The interface to each of the audio channels is a 32-bit wide shift register. In receive
direction, when the shift register is filled to a programmable level (up to 32 bits), the
whole 32-bit shift register is loaded into the receive channel read register set accessible
from the DSP and from the host. Simultaneously, a maskable interrupt status is set.
Similarly, in the transmit direction, transmit channel data is loaded from the write register
pertaining to that channel (either from DSP or host register, as selected via a control bit)
into the transmit shift register when a selectable number of bits have been shifted out.
The buffering of up to 32 bits reduces the reaction time of the DSP software.
As an alternative to this, the audio channel data can also be loaded from the shift register
to the DSP/host registers (receive direction) and from the DSP/host registers into the
shift register (transmit direction) at the occurrence of the frame sync pulse. In this case
the number of significant bits in the registers is determined by the time-slot length
programmed on the receive/transmit line. The DSP/host has 125 s to read/write the
register while new data is assembled or the contents of the shift register are transmitted,
during the following frame. (This option could be used for DSP software synchronized on
the 8-kHz time base).
The audio channel registers, each of length 2 words/4 bytes, are (see Section 3):
RC1
RC2
XC1
XC2
The relevant parameters for controlling the transfer of the audio channels are
(independent for each channel):
EN
LMOD
LBIT
Semiconductor Group
Receive channel 1.
Receive channel 2.
Transmit channel 1.
Transmit channel 2.
Enable channel.
Load mode (either once per frame, or after LBIT bits have been
received/transmitted).
Load bits. Gives the number of bits (1 to 32) to be loaded, in multiples of
the physical time-slot length.
51
Data Sheet 1998-07-01
Functional Blocks
PSB 7238