NCP1901DR2G ONSEMI [ON Semiconductor], NCP1901DR2G Datasheet - Page 3

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NCP1901DR2G

Manufacturer Part Number
NCP1901DR2G
Description
Primary Side Combination Resonant and PFC Controllers
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
Table 1. PIN FUNCTION DESCRIPTION
20 Pin
10
12
13
14
15
18
19
20
11
1
4
5
6
7
8
9
16 Pin
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
PControl
HDRVlo
HDRVhi
HBoost
PGND
PDRV
Name
VREF
PZCD
OSC
GND
PCS
PCT
VCC
HVS
PFB
HV
This is the input of the high voltage startup regulator and connects directly to the bulk voltage. A
constant current source supplies current from this pin to the V
an external startup resistor. The charge current is 7.5 mA (typical).
A capacitor on this pin adjusts the frequency of the internal oscillator. The oscillator sets the fre-
quency of the half−bridge controller. The half−bridge operates at half the oscillator frequency.
Analog ground.
Reference voltage. The capacitor on this pin decouples the internal reference. A 0.1 mF capacitor
needs to be connected between this pin and ground.
PFC voltage feedback input. The voltage on this pin is compared to a 2.5 V reference (typical) to
regulate the PFC output voltage. The voltage on this pin is also used to detect PFC undervoltage
and overvoltage conditions.
PFC regulator current sense input. A voltage ramp proportional to the PFC switch current is applied
to this pin. The current sense threshold, V
edge blanking circuit filters the current sense signal at the start of each cycle.
PFC inductor zero current detector. The inductor current is monitored using an auxiliary winding on
the PFC inductor. The PFC drive signal is enabled during a high to low transition on the PZCD pin.
A series resistor limits the current into the PZCD pin.
PFC control voltage. This pin connects to the output of the PFC error amplifier. The error amplifier is
a transconductance amplifier. A compensation network between this pin and grounds sets the PFC
loop bandwidth. The PFC control voltage is compared to a level shifted version of V
the PFC duty ratio.
PFC on time control capacitor. A 270 mA (typical) current source charges a capacitor connected
between this pin and ground. Once the level shifted PCT voltage reaches V
signal is disabled and the PCT capacitor is discharged.
Positive input supply. This pin connects to an external capacitor for energy storage. An internal
current source supplies current from HV to this pin. Once the V
typical), the current source turns off and the controller is enabled. The current source turns on once
V
by means of an auxiliary winding.
Ground connection for PDRV and HDRVlo. Tie to the power stage return with a short trace.
PFC switch gate drive control signal. The source and sink drive capability is limited to 60 W and 15
W (typical), respectively. A discrete driver may be needed to drive the external MOSFET.
Half−bridge low side switch gate drive control signal. The source and sink drive capability is limited
to 75 W and 15 W (typical), respectively. A discrete driver may be needed to drive the half bridge
switch.
Half−bridge high side driver source connection. This pin connects directly to the bridge terminal and
can float up to 600 V.
Half−bridge high side switch gate drive control signal. The source and sink drive capability is limited
to 75 W and 15 W (typical), respectively. The supply terminals of the high side driver connect to the
HBoost and HVS pins.
Supply voltage of the high side gate driver. A charge pump generates a bootstrap voltage floating on
top of the HVS voltage. A diode between the VCC and HBoost pins provides a charge path. The
bootstrap voltage is V
CC
falls to V
CC(off)
http://onsemi.com
(9.3 V typical). During normal operation, power is supplied to the IC via this pin
CC
minus a diode drop.
3
PCS(ILIM)
Description
, is typically 0.84 V. A 110 ns (typical) leading
CC
CC
capacitor, eliminating the need for
voltage reaches V
PControl
, the PFC drive
PCT
CC(on)
to control
(15.3 V

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