NCP1901DR2G ONSEMI [ON Semiconductor], NCP1901DR2G Datasheet - Page 8

• Manufacturer Part Number: NCP1901DR2G
• Description: Primary Side Combination Resonant and PFC Controllers
• Manufacturer: ONSEMI [ON Semiconductor]

Introduction
resonant controllers optimized for off−line adapter
applications. This device includes all the features needed
to implement a highly efficient and small form factor
adapter. It integrates a critical conduction mode (CrM)
power factor correction (PFC) controller and half−bridge
controller with a built−in 600 V driver. The half−bridge
stage operates at a fixed frequency. Regulation is achieved
by adjusting the PFC stage output voltage.
protection and PFC overvoltage and undervoltage
detectors. Other features included in the NCP1901 are a
600 V startup circuit and an adjustable frequency
oscillator. The controllers are properly sequenced,
simplifying system design.
Supply Sequencing
and the PFB voltage exceeds V
Once the PFC controller is enabled the PControl pin begins
to charge. Once the control voltage exceeds V
first PFC drive pulse is observed. The half−bridge driver is
enabled once the first PFC drive pulse is generated. This
ensures a monotonic output voltage rise as the input voltage
to the half bridge stage is regulated.
below V
ensures there is enough time to start the controller before
V
Output Voltage Regulation
Output voltage regulation is achieved by adjusting the
half−bridge input voltage (PFC output voltage). The PFC
output voltage is sensed using a resistor divider. The mid
point of the resistor divider connects to the PFB pin.
Subtracting current out of the feedback resistor divider
increases the PFC output voltage and thus regulation is
achieved.
High Voltage Startup Circuit
need for external startup components. In addition, this
regulator increases the efficiency of the supply as it uses no
power when in the normal mode of operation, but instead
uses power supplied by an auxiliary winding. The startup
regulator consists of a constant current source that supplies
current from the high voltage line (V
capacitor on the V
is typically 7.5 mA. The startup circuit is rated at a
maximum voltage of 600 V.
regulator is disabled and the PFC controller is enabled if the
PFB voltage exceeds V
CC
The NCP1901 is a combination of PFC and half−bridge
This device includes an enable input, open feedback loop
The PFC controller is enabled once V
The controller will not start in the event that V
The half−bridge stage operates at a fixed frequency.
The NCP1901 internal startup regulator eliminates the
Once C
reaches V
CC(MIN)
CC
is charged to 15.3 V (V
CC(off)
before PFB goes above V
CC
.
pin (C
PUVP(high)
CC
UVP(high)
). The startup current (I
. The startup regulator
DETAILED OPERATING DESCRIPTION
CC(on)
CC
, typically 290 mV.
in
) to the supply
reaches V
UVP(high)
), the startup
EA(OL)
CC
http://onsemi.com
CC(on)
. This
falls
start
the
)
8
remains disabled until the lower supply threshold, V
(typically 9.3 V) is reached. Once reached, the drive
outputs are disabled and the startup current source is
enabled. Once the outputs are disabled, the bias current of
the NCP1901 is reduced, allowing V
while operating in the power up or self−bias mode. During
the converter power up, C
voltage greater than V
auxiliary supply voltage is building up. Otherwise, V
will collapse and the controller will turn off. The IC bias
current and gate charge load at the drive outputs must be
considered to correctly size C
consumption due to external gate charge is calculated using
Equation 1.
where, f is the operating frequency and Q
charge of the external MOSFETs.
Main Oscillator
C
80% duty ratio. A current source charges C
voltage, typically 5 V. Once the peak voltage is reached, the
charge current is disabled and C
3 V by another current source. The charge and discharge
currents are typically 173 and 692 mA, respectively. The
oscillator frequency vs oscillator capacitance graph is
shown in Figure 3.
oscillator frequency. This clock signal is used to control the
half−bridge controller. The half−bridge duty ratio is limited
to 50%. The PFC is not synchronized to the oscillator as it
operates in CrM.
OSC
The supply capacitor provides power to the controller
The oscillator frequency is set by the oscillator capacitor,
An internal clock signal is generated dividing by two the
100
90
80
70
60
50
40
30
20
10
0
, on the OSC pin. The oscillator operates at a fixed
400
Figure 3. Oscillator Frequency vs.
C
OSC
800
, OSCILLATOR CAPACITOR (pF)
I
CC(gate charge)
Oscillator Capacitor
1200
CC(off)
CC
must be sized such that a V
CC
+ f @ Q
OSC
is maintained while the
. The increase in current
1600
is discharged down to
CC
G
to charge back up.
OSC
G
2000
is the gate
to its peak
CC(off)
(eq. 1)
2400
CC
CC
,